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CY26121 Datasheet, PDF (1/6 Pages) Cypress Semiconductor – PacketClock Spread Spectrum Clock Generator | |||
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CY26121
PacketClock⢠Spread Spectrum Clock Generator
Features
⢠Integrated phase-locked loop (PLL)
⢠Low jitter, high-accuracy outputs
⢠3.3V operation
⢠25-MHz input frequency
⢠66.66-MHz or 33.33-MHz selectable output frequency
(orig, -3,-11,-31)
⢠33.33-MHz or 25-MHz selectable output frequency
(-2,-21)
Benefits
High-performance PLL tailored for Spread Spectrum appli-
cation
Meets critical timing requirements in complex system
designs
Enables application compatibility
Works with commonly available crystal or driven reference
Downspread Spread Spectrum with 30-kHz nominal
modulation frequency
Frequency Table for CLKA-D
Part Number
CLKSEL=0
CY26121
66.66 MHz
CY26121-2
33.33 MHz
CY26121-3
66.66 MHz
CY26121-11
66.66 MHz
CY26121-21
33.33 MHz
CY26121-31
66.66 MHz
CLKSEL=1
33.33
25.00
33.33
33.33
25.00
33.33
Spread%
â2.8%
â2.8%
â1.4%
â2.8%
â2.8%
â1.4%
Parallel Crystal Load
6 pF
6 pF
6 pF
15 pF
15 pF
15 pF
Logic Block Diagram
25 MHz XIN
XOUT
SSON
OSC.
CLKSEL
PLL
with
Modulation Control
Flash Configuration
OUTPUT
MULTIPLEXER
AND
DIVIDERS
Pin Configuration
VDD AVDD AVSS VSS
CY26121
16-pin TSSOP
XIN 1
VDD 2
AVDD 3
CLKSEL 4
AVSS 5
VSSL 6
CLKA 7
CLKB 8
16
XOUT
15
NC
14
REF
13
VSS
12
CLKD
11
VDDL
10
SSON
9
CLKC
VDDL
CLKA
CLKB
CLKC
CLKD
VSSL
REF
Cypress Semiconductor Corporation ⢠3901 North First Street ⢠San Jose, CA 95134 ⢠408-943-2600
Document #: 38-07350 Rev. **
Revised February 11, 2003
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