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CY2544 Datasheet, PDF (1/11 Pages) Cypress Semiconductor – Quad PLL Programmable Clock Generator with Spread Spectrum | |||
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PRELIMINARY
CY2544
CY2546
Quad PLL Programmable Clock Generator with
Spread Spectrum
Features
⢠Four fully integrated phase-locked loops (PLLs)
⢠Input Frequency range:
â External crystal: 8 to 48 MHz
â External reference: 8 to 166 MHz clock
⢠Wide operating output frequency range
â 3 to 166 MHz
⢠Programmable Spread Spectrum with Center and Down
Spread option and Lexmark modulation profile
⢠Two VDD core voltage options:
â 2.5V, 3.0V, and 3.3V for CY2544
â 1.8V for CY2546
⢠Selectable output voltages:
â 2.5V, 3.0V, and 3.3V for CY2544
â 1.8V for CY2546
⢠Frequency Select feature with option to select eight different
frequencies
⢠Low jitter, high accuracy outputs
⢠Up to nine clock outputs
⢠Programmable output drive strength
⢠Glitch-free outputs while frequency switching
⢠24-pin QFN package
⢠Commercial and Industrial temperature ranges
Block Diagram
Benefits
⢠Multiple high-performance PLLs allow synthesis of
unrelated frequencies
⢠Nonvolatile programming for customized PLL frequencies,
spread spectrum characteristics, drive strength, crystal load
capacitance, and output frequencies
⢠Two Spread Spectrum capable PLLs with Linear or Lexmark
profile for maximum EMI reduction
⢠Spread Spectrum PLLs can be disabled or enabled
separately
⢠PLLs can be programmed for system frequency margin
tests
⢠Meets critical timing requirements in complex system
designs
⢠Suitable for PC, consumer, and networking applications
⢠Ability to synthesize standard frequencies with ease
⢠Application compatibility in standard and low-power
systems
EXCLKIN
XIN
XOUT
OSC
FS0
FS1
FS2
MUX
and
Control
Logic
PLL1
PLL2
PLL3
(SS)
4 of 6
Crossbar
Switch
Bank
1
Output
Dividers
and Bank
2
Drive
Strength
Control Bank
3
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
SSON
PLL4
(SS)
PD#/OE
Cypress Semiconductor Corporation
Document #: 001-12563 Rev. *A
⢠198 Champion Court ⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised February 28, 2007
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