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CY25402_11 Datasheet, PDF (1/14 Pages) Cypress Semiconductor – Two PLL Programmable Clock Generator with Spread Spectrum | |||
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CY25402/CY25422/CY25482
Two PLL Programmable Clock Generator
with Spread Spectrum
Features
â Two fully integrated phase locked loops (PLLs)
â Input frequency range
â External crystal: 8 to 48 MHz
â External reference: 8 to 166 MHz clock
â Reference clock input voltage range
â 2.5 V, 3.0 V, and 3.3 V for CY25482
â 1.8 V for CY25402 and CY25422
â Wide operating output frequency range
â 3 to 166 MHz
â Programmable spread spectrum with center and down spread
option and lexmark and linear modulation profiles
â VDD supply voltage options:
â 2.5 V, 3.0 V, and 3.3 V for CY25402 and CY25482
â 1.8 V for CY25422
â Selectable output clock voltages independent of VDD:
â 2.5 V, 3.0 V, and 3.3 V for CY25402 and CY25482
â 1.8 V for CY25422
â Frequency select feature with option to select four different
frequencies
â Power-down, Output Enable, and SS ON/OFF controls
â Low jitter, high accuracy outputs
Block Diagram
â Ability to synthesize nonstandard frequencies with Fractional-N
capability
â Three clock outputs with programmable drive strength
â Glitch-free outputs while frequency switching
â 8-pin small outline integrated circuit (SOIC) package
â Commercial and Industrial temperature ranges
Benefits
â Multiple high performance PLLs allow synthesis of unrelated
frequencies
â Nonvolatile programming for personalization of PLL
frequencies, spread spectrum characteristics, drive strength,
crystal load capacitance, and output frequencies
â Application specific programmable EMI reduction using spread
spectrum for clocks
â Programmable PLLs for system frequency margin tests
â Meets critical timing requirements in complex system designs
â Suitability for PC, consumer, portable, and networking
applications
â Capable of zero parts per million (PPM) frequency synthesis
error
â Uninterrupted system operation during clock frequency switch
â Application compatibility in standard and low power systems
XIN/
EXCLKIN
XOUT
OSC
FS0
FS1
MUX
and
Control
Logic
PLL 1
(SS)
PLL 2
(SS)
Crossbar
Switch
Output
Dividers
and
Drive
Strength
Control
CLK1
REFOUT
CLK2
SSON
PD#/OE
Cypress Semiconductor Corporation ⢠198 Champion Court
Document #: 001-12565 Rev. *F
⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised April 20, 2011
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