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CY25402 Datasheet, PDF (1/8 Pages) Cypress Semiconductor – Two PLL Programmable Clock Generator with Spread Spectrum | |||
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PRELIMINARY
CY25402
CY25422
Two PLL Programmable Clock Generator
with Spread Spectrum
Features
Benefits
⢠Two fully integrated phase-locked loops (PLLs)
⢠Input Frequency range:
â External crystal: 8 to 48 MHz
â External reference: 8 to 166 MHz clock
⢠Wide operating output frequency range
â 3 to 166 MHz
⢠Programmable Spread Spectrum modulation frequency
range of 30 to 120 kHz with Lexmark profile
⢠Center Spread: ±0.125% to ±2.5%
⢠Down Spread: â0.25% to â5%
⢠Frequency select feature with option to select four different
frequencies
⢠Low-jitter, high-accuracy outputs
⢠Up to three clock outputs
⢠Programmable output drive strength
⢠Glitch-free outputs while frequency switching
⢠Four independent output voltages: 3.3V, 3.0V, 2.5V, and
1.8V
⢠8-pin SOIC package
⢠Commercial and Industrial temperature range
⢠Multiple high-performance PLLs allow synthesis of
unrelated frequencies
⢠Nonvolatile programming for customized PLL frequencies,
spread spectrum characteristics, drive strength, crystal load
capacitance, and output frequencies
⢠Two Spread Spectrum capable PLLs with Lexmark profile
for maximum for EMI reduction
⢠Spread Spectrum PLLs can be disabled or enabled
separately
⢠PLLs can be programmed for system frequency margin
tests
⢠Meets critical timing requirements in complex system
designs
⢠Suitable for PC, consumer, and networking applications
⢠Ability to synthesize standard frequencies with ease
⢠Application compatibility in standard and low-power
systems
Block Diagram
XIN
XOUT
OSC
FS0
FS1
SSON
MUX
and
Control
Logic
PLL1
(SS)
PLL2
(SS)
Output
Dividers
and
Drive
Strength
Control
CLK1
CLK2
CLK3
PD#/OE
Cypress Semiconductor Corporation
Document #: 001-12565 Rev. *A
⢠198 Champion Court ⢠San Jose, CA 95134-1709 ⢠408-943-2600
Revised March 02, 2007
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