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CY25000 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – Programmable Spread Spectrum Clock Generator for EMI Reduction | |||
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CY25000
Programmable Spread Spectrum
Clock Generator for EMI Reduction
Features
Benefits
⢠Wide operating output (SSCLK) frequency range
â 3â200 MHz
⢠Programmable spread spectrum with nominal 30-kHz
modulation frequency
â Center spread: ±0.25% to ±2.5%
â Down spread: â0.5% to â5.0%
⢠Input frequency range
â External crystal: 8â30 MHz fundamental crystals
â External reference: 8â166 MHz Clock
⢠Integrated phase-locked loop (PLL)
⢠Programmable crystal load capacitor tuning array
⢠Low cycle-to-cycle Jitter
⢠3.3V operation
⢠Spread spectrum On/Off function
⢠Power-down or Output Enable function
⢠Services most PC peripherals, networking, and consumer
applications.
⢠Provides wide range of spread percentages for maximum
EMI reduction, to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development
and manufacturing costs and time-to-market.
⢠Eliminates the need for expensive and difficult to use higher
order crystals.
⢠Internal PLL to generate up to 200-MHz output. Able to
generate custom frequencies from an external crystal or a
driven source.
⢠Enables fine-tuning of output clock frequency by adjusting
CLoad of the crystal. Eliminates the need for external CLoad
capacitors.
⢠Suitable for most PC, consumer, and networking applica-
tions
⢠Application compatibility in standard and low-power
systems.
⢠Provides ability to enable or disable spread spectrum with
an external pin.
⢠Enables low-power state or output clocks to High-Z state.
Logic Block Diagram
XIN/CLKIN 1
XOUT 8
CXOUT
OSC.
CXIN
PLL
with
Modulation Control
Programmable Configuration
PD#/OE 3
SSON 7
24
VDD VSS
Output
Dividers
and
MUX
6 REFCLK
5 SSCLK
Pin Configuration
CY25000
8-pin SOIC
XIN/CLKIN 1
VDD 2
PD#/OE 3
VSS 4
8
XOUT
7
SSON
6
REFCLK
5
SSCLK
Cypress Semiconductor Corporation ⢠3901 North First Street ⢠San Jose, CA 95134 ⢠408-943-2600
Document #: 38-07424 Rev. *B
Revised September 26, 2003
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