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CY2310ANZ_05 Datasheet, PDF (1/8 Pages) Cypress Semiconductor – 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
1CY2310NZCY2310
NZCY2310ANZ
CY2310ANZ
Features
• One input to 10 output buffer/driver
• Supports up to four SDRAM SO-DIMMs
• Two additional outputs for feedback
• Serial interface for output control
• Low skew outputs
• Up to 100-MHz operation
• Multiple VDD and VSS pins for noise reduction
• Dedicated OE pin for testing
• Space-saving 28-pin SSOP package
• 3.3V operation
3.3V SDRAM Buffer for Mobile PCs
with 4 SO-DIMMs
Functional Description
The CY2310ANZ is a 3.3V buffer designed to distribute
high-speed clocks in mobile PC applications. The part has 10
outputs, 8 of which can be used to drive up to four SDRAM
SO-DIMMs, and the remaining can be used for external
feedback to a PLL. The device operates at 3.3V and outputs
can run up to 100 MHz, thus making it compatible with
Pentium II® processors. The CY2310ANZ can be used in
conjunction with the CY2281 or similar clock synthesizer for a
full Pentium II motherboard solution.
The CY2310ANZ also includes a serial interface which can
enable or disable each output clock. On power-up, all output
clocks are enabled. A separate Output Enable pin facilitates
testing on ATE.
Block Diagram
BUF_IN
SDATA
SCLOCK
OE
Serial Interface
Decoding
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
Pin Configuration
VDD
SDRAM0
SDRAM1
VSS
VDD
SDRAM2
SDRAM3
VSS
BUF_IN
VDD
SDRAM8
VSS
VDDIIC
SDATA
28-pin SSOP
Top View
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VDD
SDRAM7
SDRAM6
VSS
VDD
SDRAM5
SDRAM4
VSS
OE
VDD
SDRAM9
VSS
VSSIIC
SCLOCK
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07142 Rev. *B
Revised January 19, 2005
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