CY2302_05 Datasheet, PDF (1/7 Pages) Cypress Semiconductor – Frequency Multiplier and Zero Delay Buffer

CY2302
Frequency Multiplier and Zero Delay Buffer
Features
• 90ps typical jitter OUT2
• 200ps typical jitter OUT1
• 65ps typical output-to-output skew
• 90ps typical propagation delay
• Voltage range: 3.3V±5%, or 5V±10%
• Output frequency range: 5MHz-133MHz
• Two outputs
• Configuration options allow various multiplications of
the reference frequency—refer to Table 1 to determine
the specific option which meets your multiplication
needs
• Available in 8-pin SOIC package
Table 1. Configuration Options
FBIN
OUT1
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT2
FS0 FS1
OUT1
0
0
2 X REF
1
0
4 X REF
0
1
REF
1
1
8 X REF
0
0
4 X REF
1
0
8 X REF
0
1
2 X REF
1
1
16 X REF
OUT2
REF
2 X REF
REF/2
4 X REF
2 X REF
4 X REF
REF
8 X REF
Block Diagram
FBIN
FS0
÷Q
FS1
External feedback connection to
OUT1 or OUT2, not both
Pin Configuration
FBIN
IN
GND
FS0
SOIC
1
8
2
7
3
6
4
5
OUT2
VDD
OUT1
FS1
IN
Reference
Input
Phase
Detector
Charge
Pump
Loop
Filter
Output
Buffer
VCO
÷2
Output
Buffer
OUT1
OUT2
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07154 Rev. *A
Revised August 29, 2005