CY22E016L Datasheet, PDF (1/14 Pages) Cypress Semiconductor – 16-Kbit (2K x 8) nvSRAM

PRELIMINARY
CY22E016L
16-Kbit (2K x 8) nvSRAM
Features
• 25 ns, 35 ns and 45 ns Access Times
• “Hands-off” Automatic STORE on Power Down with
external 68µF capacitor
• STORE to QuantumTrap^® Nonvolatile Elements is
initiated by Hardware or Autostore^®on Power-down
• RECALL to SRAM Initiated on Power-up
• Infinite READ, WRITE and RECALL Cycles
• 10 mA Typical I_CC at 200 ns Cycle Time
• 1,000,000 STORE Cycles to QuantumTrap
• 100-Year Data Retention to QuantumTrap
• Single 5V Operation +10%
• Commercial, Industrial Temperature
• SOIC Package
• RoHS Compliance
Functional Description
The Cypress CY22E016L is a fast static RAM with a nonvol-
atile element incorporated in each static memory cell. The
SRAM can be read and written an infinite number of times,
while independent, nonvolatile data resides in Nonvolatile
Elements. Data transfers from the SRAM to the Nonvolatile
Elements (the STORE operation) can take place automatically
on power down. A 68-µF or larger capacitor tied from V_CAP to
ground guarantees the STORE operation, regardless of
power-down slew rate or loss of power from “hot swapping”.
Transfers from the Nonvolatile Elements to the SRAM (the
RECALL operation) take place automatically on restoration of
power. A hardware STORE may be initiated with the HSB pin.
Logic Block Diagram
Quantum Trap
V_CC
V_CAP
32 X 512
POWER
A₅
STORE
CONTROL
A₆
A₇
A₈
STATIC RAM
ARRAY
32 X 512
RECALL
STORE/
RECALL
CONTROL
HSB
A₉
DQ ₀
DQ ₁
DQ ₂
DQ ₃
DQ ₄
DQ ₅
DQ ₆
DQ ₇
COLUMN I/O
COLUMN DEC
A₀ A₁ A₂ A₃ A₄ A₁₀
OE
CE
WE
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709
• 408-943-2600
Document #: 001-06727 Rev. *C
Revised November 28, 2006
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