CY22388_06 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – Factory Programmable Quad PLL Clock Generator with VCXO

Features
•Fully integrated phase-locked loops (PLLs)
•QFN package:
•40% smaller than 20-pin TSSOP
•22% smaller than 16-pin TSSOP
•Selectable Output Frequency
•Programmable Output Frequencies
•OutputFrequencyRangeof5–166MHz
•Input Frequency Range
•Crystal:10–30MHz
•ExternalReference:1–100MHz
•Analog VCXO
•16-/20-pin TSSOP and 32-pin QFN packages
•3.3V operation with 2.5V output buffer option
CY22388/89/91
Factory Programmable Quad PLL
Clock Generator with VCXO
Benefits
•Meets most Digital Set Top Box, DVD Recorder, and DTV
application requirements
•Multiple high-performance PLLs allow synthesis of
unrelated frequencies
•Integration eliminates the need for external loop filter
components
•Meets critical timing requirements in complex system
designs
•Enables application compatibility
•Complete VCXO solution with ±120 ppm (typical pull range)
Block Diagram
X IN
XOUT
V IN
VCXO
PLL1
PLL2
PLL3
PLL4
D iv ide r
&
M ultiplexer
F S 0 /1 /2
OE
Select
Logic
Pin Configurations
XIN
FS0
FS1
VIN
VDD
VSS
CLKA
CLKB
16-Pin TSSOP
1
16
2
15
3
14
4
13
CY22388
5
12
6
11
7
10
8
9
XOUT
VDD
FS2
VDD
VSS
CLKE
CLKD
CLKC
X IN
FS0
FS1
CLKH
VDD
VSS
CLKD
CLKB
CLKA
CLKC
20-Pin TSSOP
1
20
2
19
3
18
4
17
5
16
CY22389
6
15
7
14
8
13
9
12
10
11
XOUT
VDD
O E /P D
FS2
VIN
VDD
VSS
CLKG
CLKF
CLKE
C LK A
CLKB
C LK C
CLKD
CLKE
C LK F
CLKG
CLKH
VIN 1
VDD ²
VDD 3
VSS 4
VSS 5
VSS 6
VSS 7
CLKH 8
32-Pin Q FN
CY22391
24 OE /PD #
23 FS2
22 VDD
21 VDD
20 VSS
19 VSS
18 CLKG
17 CLKF
Cypress Semiconductor Corporation
Document #: 38-07734 Rev. *B
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised October 10, 2006
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