CY22150 Datasheet, PDF (1/13 Pages) Cypress Semiconductor – One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator

CY22150
One-PLL General-Purpose Flash-Programmable
and 2-Wire Serially Programmable Clock Generator
Features
• Integrated phase-locked loop (PLL)
• Commercial and industrial operation
• Flash-programmable
• Field-programmable
• 2-wire serial programming interface
• Low-skew, low-jitter, high-accuracy outputs
• 3.3V operation with 2.5V output option
• 16-lead TSSOP
Benefits
• Internal PLL to generate six outputs up to 200 MHz. Able
to generate custom frequencies from an external
crystal or a driven source.
• Performance guaranteed for applications that require
an extended temperature range.
• Nonvolatile reprogrammable technology allows easy
customization, quick turnaround on design changes
and product performance enhancements, and better
inventory control. Parts can be reprogrammed up to 100
times, reducing inventory of custom parts and
providing an easy method for upgrading existing
designs.
• The CY22150 can be programmed at the package level.
In-house programming of samples and prototype
quantities is available using the CY3672 FTG Devel-
opment Kit. Production quantities are available through
Cypress’s value-added distribution partners or by
using third party programmers from BP Micro-
systems, HiLo Systems, and others.
• The CY22150 provides an industry-standard interface
for volatile, system-level customization of unique
frequencies and options. Serial programming and
reprogramming allows quick design changes and
product enhancements, eliminates inventory of old
design parts, and simplifies manufacturing.
• High performance suited for commercial, industrial,
networking, telecomm and other general-purpose
applications.
• Application compatibility in standard and low-power
systems.
• Industry-standard packaging saves on board space.
Logic Block Diagram
XIN
XOUT
OSC.
Q
Φ
VCO
P
PLL
Divider
Bank 1
Divider
Bank 2
Crosspoint
Switch
Matrix
Serial
SDAT
Programming
Interface
SCLK
SPI
Control
VDD VSS AVDD AVSS VDDL VSSL
LCLK1
LCLK2
LCLK3
LCKL4
CLK5
CLK6
Pin Configuration
XIN 1
VDD 2
AVDD 3
SDAT 4
AVSS 5
VSSL 6
LCLK1 7
LCLK2 8
16 XOUT
15 _CLK6
14 _CLK5
13 _VSS
12 _LCLK4
11 _VDDL
10 _SCLK
9 _LCLK3
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07104 Rev. *F
Revised August 11, 2004