CY14B256L_09 Datasheet, PDF (1/18 Pages) Cypress Semiconductor – 256 Kbit (32K x 8) nvSRAM

CY14B256L
256 Kbit (32K x 8) nvSRAM
Features
■ 25 ns, 35 ns, and 45 ns access times
■ Pin compatible with STK14D88
■ Hands off automatic STORE on power down with only a small
capacitor
■ STORE to QuantumTrap™ nonvolatile elements is initiated by
software, hardware, or AutoStore™ on power down
■ RECALL to SRAM initiated by software or power up
■ Unlimited READ, WRITE, and RECALL cycles
■ 200,000 STORE cycles to QuantumTrap
■ 20 year data retention at 55°C
■ Single 3V +20%, –10% operation
■ Commercial and industrial temperature
■ 32-pin (300 mil) SOIC and 48-pin (300 mil) SSOP packages
■ RoHS compliance
Functional Description
The Cypress CY14B256L is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent, nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control. A hardware
STORE is initiated with the HSB pin.
Logic Block Diagram
A₅
A₆
A₇
A₈
A₉
A ₁₁
A ₁₂
A ₁₃
A ₁₄
Quantum Trap
512 X 512
STORE
STATIC RAM
ARRAY
512 X 512
RECALL
DQ ₀
DQ ₁
DQ ₂
DQ ₃
DQ ₄
DQ ₅
DQ ₆
DQ ₇
COLUMN I/O
COLUMN DEC
A₀ A₁ A₂ A₃ A₄ A₁₀
V_CC
V_CAP
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
- A₁₃ A₀
OE
CE
WE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-06422 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 30, 2009
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