CCLD-033 Datasheet, PDF (3/3 Pages) List of Unclassifed Manufacturers – 5x7mm SMD LVDS Clock Oscillator

CCLD-033 Model
5×7 mm SMD, 3.3V, LVDS
CCLD-033 5×7mm SMD
LVDS Clock Oscillator
Crystek Part Number Guide
CCLD - 033 X - 50 - 155.520
#1
#2 #3 #4
#5
#1 Crystek LVDS Osc.
#2 Model 033
#3 Temp Range: Blank = 0/70°C, M = -20/70°C, X = -40/85°C
#4 Stability: (see Table 1)
#5 Frequency in MHz: 3 or 6 decimal places
Example:
CCLD‐033X‐50‐155.520
3.3V, ‐40/85°C, ±50ppm, 155.520 MHz
Stability Indicator
Blank
50
25
20*
± 100ppm
± 50ppm
± 25ppm
± 20ppm
*not available in -40/85
Table 1
Mechanical:
Shock:
Solderability:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition I or J
Environmental:
Thermal Shock: MIL-STD-883, Method 1011, Condition A
Moisture Resistance: MIL-STD-883, Method 1004
RECOMMENDED REFLOW SOLDERING PROFILE
260°C
217°C
Ramp-Up
3°C/Sec Max.
Critical
Temperature Zone
Ramp-Down
6°C/Sec.
200°C
150°C
Preheat
180 Secs. Max.
8 Minutes Max.
90 Secs. Max.
260°C for
10 Secs. Max.
NOTE: Reflow Profile with 240°C peak also acceptable.
0.276 ±0.008
(7.00 ±0.20)
Part Number
Frequency
DC Lot Code
0.197 ±0.008
(5.00 ±0.20)
Denotes pad 1
0.055 Typ
(1.40 Typ)
#1
#2
#3
#6
#5
#4
0.100
(2.54)
0.200
(5.08)
0.045 ±0.008
(1.14 ±0.20)
Dimensions inches (mm)
All dimensions are Max unless otherwise specified.
0.071
(1.80)
via to
ground
0.01µF
SUGGESTED PAD LAYOUT
0.071 SQ
(1.80)
0.148
(3.75)
0.200
(5.08)
0.01uF Bypass Capacitor Recommended
Enable/Disable
Function pin 1
Output pin
Open or N/C
"1" level 0.7×Vdd Min
"0" level 0.3×Vdd Max
Active
Active
High Z
PIN
Connection
1 Enable/Disable
2
N/C
3
GND
4
Output
5
Comp Output
6
Vcc
Rev: R
Date: 13-Feb-2017
Page 3 of 3
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