CPLL66-3160-3380 Datasheet, PDF (2/6 Pages) CRYSTEK CORPORATION – PLL/Synthesizer needing only an external frequency reference and supply voltages for the internal PLL (phase lock loop) and VCO

PERFORMANCE SPECIFICATION
Frequency Range:
Step Size
Settling Time
Output Pow er:
Output Phase Noise
@1KHz offset
@10KHz offset
@100KHz offset
@1MHz offset
Power Supply
V1=VCO Supply
V2=PLL Supply
Supply Current
I1=VCO Input Current
I2=PLL Input Current
Spurious Suppression
PFDSpur
Reference Feedthru
Harmonic Suppression (2nd Harmonic):
2nd
3rd
Reference Frequency
RF Output Level
Input Impedance
Rf Output Impedance
Operating Temperature Range:
MIN
3.160
0
4.75
2.7
-5
-40
TYP
2500
3
3
-85
-95
-115
-135
5
3
50
25
-70
-80
-15
-25
10
0
100K
50
CPLL66-3160-3380
0.60" SQ SMD
MAX
3.380
6
UNITS
GHz
KHz
msec
dBm
-80 dBc/Hz
-90 dBc/Hz
-110 dBc/Hz
-130 dBc/Hz
5.25
Volts
3.3
Volts
mA
mA
-60
dBc
-70
dBc
-10
dBc
-15
dBc
MHz
5
dBm
Ohm
Ohm
+85
°C
Output Phase Noise:
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