Y3390 Datasheet, PDF (1/1 Pages) Crystek Corporation – Clock Oscillator

Y33xx Model
9X14 mm SMD,3.3V,HCMOS
LeaCRdooFmHrpeSleiant
Frequency Range:
Frequency Stability:
Temperature Range:
Operating:
(Option M)
(Option E)
Storage:
Input Voltage:
Input Current:
Output:
Symmetry:
Rise/Fall Time:
1.544MHz to 66.667MHz
±25ppm,±50ppm,±100ppm
0°C to 70°C
-20°C to 70°C
-40°C to 85°C
-55°C to 120°C
3.3V ± 0.3V
20mA Max @ 66MHZ
HCMOS
45/55% Max @ 50% Vdd
8ns Max @ 20% to 80% Vdd
Logic:
Load:
Jitter RMS: 12KHz~20MHz
Aging:
"0" = 10% Vdd Max
"1" = 90% Vdd Min
30pF Max
0.5ps Typ, 1ps Max
<3ppm 1st/yr, 1ppm every year thereafter
Clock Oscillator
Designed to meet today's
requirements for low jitter
3.3V applications. The Y33xx
Series is a Non-PLL based
oscillator design for excellent
jitter performance. Available
on tape and reel in quantities
of 1K.
Dimensions inches (mm)
All dimensions are Max unless otherwise specified.
4
3
.340
CRYSTEK
(8.64)
P/N DC
.386
(9.80)
1
2
.551
(14.00)
.020
(.51)
.200
(5.08)
.160
(4.06)
.010 MIN
(.25)
RECOMMENDED REFLOW SOLDERING PROFILE
260°C
217°C
Ramp-Up
3°C/Sec Max.
Critical Temperature
Zone
Ramp-Down
6°C/Sec.
200°C
150°C
Tri-State Function
Function pin 1 Output pin
Preheat
180 Secs. Max.
8 Minutes Max.
90 Secs. Max.
260°C for
10 Secs. Max.
NOTE: Reflow Profile with 240°C peak also acceptable.
Open
"1" level 2.4V Min
"0" level 0.4V Max
Active
Active
High Z
PWR
Supply
mA
M
VM
pin 4
pin 3
Vdd
OUT
Bypass
Cap.
pin 1
OSC.
GND
pin 2
OUT
O/P Load
incl Probe Cl
.200
(5.08)
.300
(7.62)
.118
(3.00)
.300
(7.62)
SUGGESTED PAD
.070
(1.78)
LAYOUT
Bypass Capacitor Recommended
Crystek Part Number Guide
Example: Y3392-44.736MHZ
Intermediate Temp: YM3392-44.736MHZ
Extended Temp: YE3392-44.736MHZ
Y= 0°C to 70°C
*YM= -20°C to 70°C, *YE= -40°C to 85°C
Symmetry 40/60%
Part Number
Freq. Stability
Y*3390
Y*3392
Y*3391
+/-100ppm
+/- 50ppm
+/- 25ppm
(+/- 100ppm only)
-40°C to 85°C
High Impedance
GND or "LOW"
Oscillation
OPEN or "HIGH"
Specifications subject to change without notice. TD-050301 Rev.C