W-5200-5 Datasheet, PDF (8/11 Pages) Copal Electronics – Low Noise Regulated

W-5200ï5
Application Information
Ceramic Capacitors
Ceramic capacitors of different dielectric materials lose
their capacitance with higher temperature and voltage at
different rates. For example, a capacitor made of X5R or
X7R material will retain most of its capacitance from – 40$C
to 85$C whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range.
Z5U and Y5V capacitors may also have voltage
coefficient causing them to lose 60% or more of their
capacitance when the rated voltage is applied. When
comparing different capacitors it is often useful consider the
amount of achievable capacitance for a given case size rather
than discussing the specified capacitance value. For
example, over rated voltage and temperature conditions, a
1 F, 10 V, Y5V ceramic capacitor in an 0603 case may not
provide any more capacitance than a 0.22 F, 10 V, X7R
available in the same 0603 case. For many W-5200/
:ï5 applications these capacitors can be considered
roughly equivalent.
The capacitor manufacturer·s data sheet should be
consulted to determine what value of capacitor is needed to
ensure the desired capacitance at all temperatures and
voltages. Below is a list of ceramic capacitor
manufacturers and how to contact them:
Table 5. CERAMIC CAPACITOR MANUFACTURERS
Capacitor
Manufacturer
Web
Phone
Murata
www.murata.com
814.237.1431
AVX/Kemet
www.avxcorp.com
843.448.9411
Vishay
www.vishay.com
Kemet
www.kemet.com
408.986.0424
Taiyo Yuden
www.tïyuden.com
408.573.4150
Thermal Management
For higher input voltages and maximum output current
therecanbesubstantialpowerdissipationinthe
:ï. If the junction temperature increases to 160$C,
the thermal shutdown circuitry will automatically turn off
the output.
A good thermal connection to the PC board is
recommended to reduce the chip temperature. Connecting
theGNDpin(Pin2toagroundplane,andmaintaininga
solid ground plane under the device reduces the overall
thermal resistance.
The overall junction to ambient thermal resistance ( _JA
for device power dissipation (P_DFRQVLVWVSULPDULO\RIWZo
paths in series. The first path is the junction to the case ( _JC
which is defined by the package style, and the second path
is case to ambient ( _CA thermal resistance which is
dependent on board layout. The final operating junction
temperature for any set of conditions can be estimated by the
following thermal equation:
T_JUNC = T_AMB + P_D ( _JC3_D ( _CA
T_JUNC = T_AMB + P_D ( _JA
The SOT23 package, when mounted on printed circuit
boardwithtwosquareinchesofcopperallocatedfor “heat
spreading”, will result with an overall e_{J A} of less than
150$C/W.
For a typical application operating from a 3.8 V input
supply, the maximum power dissipation is 260 mW
(100 mA x 3 9 This would result if a maximum junction
temperature of:
T_JUNC = T_AMB + P_D ( _JA
T_JUNC = 85$C + 0.26 W (150$&:
T_JUNC = 85$C + 39$C = 124$C
The use of multiïlayer board construction with power
planes will further enhance the overall thermal performance.
In the event of no dedicated copper area being used for heat
spreading,amultiïl ayerboardwilltypicallyprovidethe
with an overall _JA of 200$C/W. This level of thermal
conduction would allow up to 200 mW be safely
dissipated within the device.
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