DP7259 Datasheet, PDF (1/16 Pages) Copal Electronics – Quad Digital Potentiometers

Quad Digital Potentiometers
(DP) with 256 Taps and 2-wire Interface
DP7259
FEATURES
Four linear taper digital potentiometers
256 resistor taps per potentiometer
End to end resistance 50kŸ or 100kŸ
Potentiometer control and memory access via
2-wire interface (I²C like)
Low wiper resistance, typically 100Ÿ
Nonvolatile memory storage for up to four
wiper settings for each potentiometer
Automatic recall of saved wiper settings at
power up
2.5 to 6.0 volt operation
Standby current less than 1µA
1,000,000 nonvolatile WRITE cycles
100 year nonvolatile memory data retention
24-lead SOIC and 24-lead TSSOP packages
Industrial temperature range
For Ordering Information details, see page 15.
DESCRIPTION
The DP7259 is four digital potentiometers
(DPs) integrated with control logic and 16 bytes
of NVRAM memory. Each DP consists of a series
of resistive elements connected between two
externally accessible end points. The tap points
between each resistive element are connected to the
wiper outputs with CMOS switches. A separate 8-bit
control register (WCR) independently controls the
wiper tap switches for each DP. Associated with
each wiper control register are four 8-bit non-volatile
memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or
any of the non-volatile data registers is via a 2-wire
serial bus. On power-up, the contents of the first data
register (DR0) for each of the four potentiometers
is automatically loaded into its respective wiper
control registers.
The DP7259 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications. It is available in the -40ºC to 85ºC
industrial operating temperature ranges and offered in
a 24-lead SOIC and TSSOP package.
PIN CONFIGURATION
SOIC (W)
TSSOP (Y)
NC 1
A0 2
R_W3 3
R_H3 4
R_L3 5
NC 6
V_CC 7
R_LO 8
R_HO 9
R_WO 10
A2 11
¯W¯P¯ 12
24 A3
23 SCL
22 R_L2
21 R_H2
20 R_W2
19 NC
18 GND
17 R_W1
16 R_H1
15 R_L1
14 A1
13 SDA
FUNCTIONAL DIAGRAM
SCL
SDA
WP
A₀
A₁
A₂
A₃
R_H0
R_H1
R_H2
R_H3
2-WIRE BUS
WIPER CONTROL
INTERFACE
REGISTERS
R_W0
R_W1
NONVOLATILE
R_W2
CONTROL LOGIC
DATA
REGISTERS
R_W3
R_L0
R_L1
R_L2
R_L3
© NIDEC COPAL ELECTRONICS CORP.
1
Characteristics subject to change without notice
Doc. No. MD-2000 Rev. H