STL-S3 Datasheet, PDF (22/24 Pages) Connor-Winfield Corporation – Stratum 3 Timing Module

Mode and Alarm Timing Diagram
Figure 19
State Change on Control Input Pins
(CNTRL1-3)
Operational Mode Indicators
(Ref1-Ref6, Hold Over or Free Run)
Alarm Indicator
(See Operation Overview for
details on Alarm Operation)
LOCK Timing Diagram
Figure 20
2 ms < ∆t < 4 ms
Internal 8kHz
(Derived from Sync_Out)
External 8kHz
(Derived from Active Reference)
Internal Phase
Error Signal
≤20 µs
Lock Indicator
>20 µs
>20 µs
>20 µs
t_delay
≥ 2ms
0ms ≤ t_delay ≤ 2ms
t_delay
Preliminary Data Sheet #: TM055 Page 22 of 24 Rev: P00 Date: 5/17/04
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice