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SM34 Datasheet, PDF (14/31 Pages) Connor-Winfield Corporation – 8 REFERENCE SURFACE MOUNT STRATUM 3 MODULE
Register Descriptions and Operation continued
Op_Mode, 0x05 (R/W)
Bit 7 ~ Bit 5
Reserved
Bit 4
Master or Slave Mode
1: Master
0: Slave
(Read Only)
Bit 3 ~ Bit 0
Free Run, Locked, or Hold Over:
0000: Free Run mode
0001: Locked on Ref1
0010: Locked on Ref2
0011: Locked on Ref3
0100: Locked on Ref4
0101: Locked on Ref5
0110: Locked on Ref6
0111: Locked on Ref7
1000: Locked on Ref8
1001 - 1111: Hold Over
Bit 4 of this register is read-only and follows the state of the M/S pin.
When the device is in slave mode, it will lock to the Xref input, independent of the values written to bits 3 - 0 of the
Op_mode register. The operational mode and reference selection written to bits 3 - 0 while in slave mode will, however,
take effect when the device is made the master.
When bit 1 of the Ctl_Mode register is reset (automatic reference and mode selection) and the device is in master
mode, bits 3 - 0 of the Op_Mode register become read-only.
When bit 1 of the Ctl_Mode register is 1 (manual reference and mode selection), you write to bit 3 - 0 to select the ac-
tive reference, freerun or holdover.
Max_Pullin_Range, 0x06 (R/W)
Bit 7 ~ Bit 0
Maximum pull-in range in 0.1 ppm unit
This register should be set according to the values specified by the standards (GR-1244) appropriate for the particular
stratum of operation. The power-up default value is 10 ppm.(= 4.6ppm aging + 4.6 ppm pullin + margin).
M/S REF_Activity, 0x07 (R)
Bit 7 ~ Bit 4
Bit 3 ~ Bit 0
Reserved
Cross reference activity
0000: No signal
0001: 8kHz
0100: 12.96MHz
0101: 19.44MHz
0110: 25.92MHz
0111: 38.88MHz
1000: 51.84MHz
1001: 77.76MHz
1010-1111: Reserved
Indicates signal presence and auto-detected frequency for the M/S REF input.
Ref_Activity, 0x08 (R)
Bit 7
ref8 activity
1: on
0: off
Bit 6
ref7 activity
1: on
0: off
Bit 5
ref6 activity
1: on
0: off
Bit 4
ref5 activity
1: on
0: off
Bit 3
ref4 activity
1: on
0: off
Each bit indicates the presence of a signal for that reference.
Bit 2
ref3 activity
1: on
0: off
Bit 1
ref2 activity
1: on
0: off
Bit 0
ref1 activity
1: on
0: off
SM34 Data Sheet #: TM095 Page 14 Rev: 05 Date: 11/19/12
© Copyright 2012 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice