SCG2550 Datasheet, PDF (1/8 Pages) Connor-Winfield Corporation – Synchronous Clock Generators

2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: [phone]
Fax: [phone]
www.conwin.com
SCG2550
Synchronous Clock
Generators
US Headquarters:
630-851-4722
European Headquarters:
[phone]
General Description
The SCG2550 is a mixed-signal phase lock loop
generating CMOS outputs from an intrinsically low jitter
voltage controlled crystal oscillator.
The SCG2550 can lock to one of two possible input
reference frequencies at 8 kHz which is selectable
using one input select pin.
Further features include an alarm output to indicate
Loss of Reference, LOR, or Loss of Lock, LOL. If only
one of the references is lost, the unit will disable its
phase detector and will signal an alarm, but will not
switch reference automatically. If both references are
lost, the SCG2550 will enter a Free Run state which will
guarantee a 20 ppm accurate output. Additionally, the
Free Run mode may be entered manually by applying a
high signal to the Free Run pin. If the unit is in Free Run
mode, the Free Run status pin will be high.
The outputs may be put into the tri-state high
impedance condition for external testing purposes by
applying a high signal to the Reset/Tri-State pin.
The filtered 19.44 MHz is derived from the oscillator
output. The offset between the filtered output and the
reference input will change with each reference
rearrangement.
The package maximum dimensions are .780” x
.830” x .350” on a six layer FR4 board with surface
mount pins. Parts are assembled using high
temperature solder to withstand surface mount reflow
process.
Features
• Phase Locked Output
Frequency Control
• Intrinsically Low Jitter Crystal
Oscillator
• Two Selectable References @ 8
kHz
• Alarm Output
• Tri-Statable Alarm Outputs
• Force Free Run Function
• Automatic Free Run Operation
upon loss of both references
• Input Duty Cycle Tolerant
• 3.3 Volt Power Supply
• Small Size: 0.78” x 0.83” x 0.35”
maximum
• Surface Mount, DIL Package