MSTM-S3-R Datasheet, PDF (1/7 Pages) Connor-Winfield Corporation – STRATUM 3 SIMPLIFIED CONTROL TIMING MODULES

C O N N O R THE CONNOR-WINFIELD CORP.
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NETWORK ELEMENT TIMING GENERATOR
STRATUM 3 SIMPLIFIED CONTROL
TIMING MODULES (MSTM-S3-R)
DESCRIPTION
The Connor-Winfield Stratum 3 Simplified Control
Timing Module acts as a complete system clock module for general
Stratum 3 timing applications. The MSTM is designed for external
control functions. Full external control input allows for selection
and monitoring of any of four possible operating states: 1)
Holdover, 2) External Reference #1, 3) External Reference #2,
and 4) Free Run. The table below illustrates the control signal
inputs and corresponding operational states:
In the absence of External Control Inputs (A,B), the
MSTM enters the Free Run mode and signals an External Alarm.
The MSTM will enter other operating modes upon application of
a proper control signal. Mode 1 operation (A=1, B=0) results in
an output signal that is phase locked to the External Reference
Input #1. Mode 2 operation (A=0, B=1) results in an output signal
that is phase locked to External Reference Input #2. Holdover
mode operation (A=1, B=1) results in an output signal at or near
the frequency as determined by the latest (last) locked-signal input
values and the holdover performance of the MSTM. In Free Run
mode, operation (A=0, B=0) is a guaranteed output of 4.6 ppm of
the nominal frequency.
Alarm signals are generated at the Alarm Output during
Holdover and Free Run operation. Alarm Signals are also
generated by loss-of-lock, loss of Reference, and by a Tune-Limit
indication from the PLL. A Tune-Limit alarm signal indicates
that the VCXO tuning voltage is approaching within 10% the limits
of its lock capability and that the External Reference Input may
be erroneous. A high level indicates an alarm condition. Real-
time indication of the operational mode is available at unique
operating mode outputs on pins 1-4.
Control loop filters effectively attenuate any reference
jitter and smooth out phase transients.
Fig. 1
MSTM-S3-R PIN ASSIGNMENT
+5Vdc
18
EX REF 1
17
GND
16
EX FEF 2
15
GND
14
CLK_OUT
13
GND
12
SYNC_OUT
11
TRI-STATE
10
1
HOLDOVER
2
REF 1
3
REF 2
4
FREERUN
5
GND
6
ALARM OUT
7
CNTL A
8
CNTL B
9
PLL TVL
BOTTOM VIEW
Fig. 2
CNTL A
CNTL B
EX REF 1
EX REF 2
0
1
2
2:4 3
BLOCK DIAGRAM
FREE RUN
REF 1
REF 2
HOLD OVER
PLL TVL
FREE RUN
HOLD OVER
2:1
MUX
PHASE
COMPARATOR
LOCK AND
DETECTION
DAC
FILTERS
DAC
STRATUM3
TCXO
TUNING
VOLTAGE
MONITOR
PLL_TVL
FIFO
STRATUM3
TCXO
MSTM-S3-R
ALARM OUT
2:1
MUX
SYNC_OUT
CLK_OUT
TABLE 1.0
CONTROL
INPUTS
OPERATIONAL MODE
INDICATOR PIN
OUTPUTS
A
B
TRI- STA TE
REF 1
REF2
HOLD _{FREE RUN PLL_TVL} ALARM
OVER
OUTPUT
0
0
0
FREE RUN MODE (DEFAULT)
0
0
0
1
0
1
EXTERNAL _NORMAL
1
0
0
0
0
0
0
1
0
REFERENCE _{PLL TUNING VOLTAGE LIMIT}
1
0
0
0
1
1
#1
LOR + LOL
1
0
0
0
0
1
MODE
EXTERNAL _NORMAL
0
1
0
0
0
0
0
0
1
REFERENCE _{PLL TUNING VOLTAGE LIMIT}
0
1
0
0
1
1
#2
LOR + LOL
0
1
0
0
0
1
MODE
0
1
1
HOLD OVER MODE
0
0
1
0
0 or 1
1
1
X
X
TRI-STATE MODE
HIGH IMPEDANCE
PRELIMINARY
DATA SHEET #: T__M__0_2_2______ PAGE__1____ OF ___7____ REV:_P__0_2____ DATE:__3_/2_1__/0_1_____
Specifications subject to change without notice.