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FPLD54TE1G5 Datasheet, PDF (1/2 Pages) Connor-Winfield Corporation – 3.3V SURFACE MOUNT CLOCK OSCILLATOR
THE CONNOR-WINFIELD CORP.
2111 COMPREHENSIVE DRIVE.
AURORA, IL 60505.
FAX (630) 851-5040.
PHONE (630) 851-4722.
WWW.CONWIN.COM
PRODUCT
D AT A
SHEET
CRYSTAL CONTROLLED OSCILLATORS
3.3V SURFACE MOUNT CLOCK OSCILLATOR
CW
0611
FPLD54TE1G5
622.08M
ABSOLU TE MAX IMUM RATING S
PARAMETER
Storage Temperature
Supply Voltage
Control Voltage
UNITS
(Vcc)
(Vc)
MINIMUM
-40
-0.5
-0.5
NOMINAL
-
-
-
MAXIMUM
85
7.0
7.0
UNITS
°C
Vdc
Vdc
TABLE 1.0
NOTE
OPERATING SPECIFIC ATIONS
PARAMETER
Center Frequency
Total Frequency Tolerance
Operating Temperature Range
Supply Voltage
Supply Current
Jitter (BW=10Hz to 20MHz)
Jitter (BW=12kHz to 80MHz)
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at 100KHz offset
(Fo)
(Vcc)
(Icc)
MINIMUM
-
-20
0
3.135
-
-
-
-
-
-
-
NOMINAL
622.08000
644.53125
666.51430
669.32660
672.16270
-
-
3.3
-
-
-
-60
-90
-130
-135
MAXIMUM
-
20
70
3.465
100
5
1
-
-
-
-
TABLE 2.0
UNITS
NOTE
MHz
ppm
1
°C
Vdc
mA
ps rms
ps rms
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
FPLD54TE1G5
DESCRIPTION
The Connor-Winfield
FPLD54TE1G5 is a 3.3V
Clock Oscillator with
Differential LVPECL outputs
and Enable/Disable function.
The FPLD54TE1G5 is
designed for use with PLL
systems in SONET/SDH
systems requiring low jitter
and tight stability. No
multiplication schemes are
used in this oscillator design.
INPUT CHARACTERISTICS
PARAMETER
Enable Input Voltage (Low) (Default)
Disable Input Voltage (High)
(Vil)
(Vih)
MINIMUM
-
2.275
NOMINAL
-
-
MAXIMUM
1.68
-
UNITS
Vdc
Vdc
TABLE 3.0
NOTE
2
2
LOW VOLTAGE PECL OUTPUT CHARACTERISTICS
PARAMETER
MINIMUM
LOAD
-
Voltage
(High)
(Voh)
2.275
(Low)
(Vol)
-
Duty Cycle at 50% Level
45
Rise / Fall Time 20% to 80%
-
NOMINAL
-
-
-
50
-
MAXIMUM
50
-
1.68
55
1
UNITS
Ohms
Vdc
Vdc
%
nS
TABLE 4.0
NOTE
3
PACKAG E CHARACTERISTICS
Package
TABLE 5.0
Non-hermetic package consisting of an FR4 substrate with grounded metal
cover.
PROCESS
RECOMMENDATIONS
Soldering Process
Wash
See solder profile on page 2.
Ultrasonic cleaning is not recommended.
TABLE 6.0
Notes
1.0
2.0
3.0
Inclusive of calibration @ 25°C, frequency stability vs. temperature, supply and load variations, shock, vibration
and aging for twenty years. Control voltage (Vc) = 1.65 Vdc.
When oscillator is disabled the true output is in a low state (Vol) and the complementary output is in the high
state (VoH). Outputs are enabled with no connection on enable pad.
50 ohm termination into Vcc-2V or Thevein equivalent.
FEATURES
LOW PROFILE, SURFACE MOUNT
PACKAGE
3.3V OPERATION
LOW JITTER <1pS RMS
TOTAL FREQUENCY TOLERANCE:
±20ppm
TEMPERATURE RANGE: 0 to 70°C
DIFFERENTIAL LVPECL OUTPUTS
ENABLE / DISABLE FUNCTION
TAPE AND REEL PACKAGING
RoHS 5/6 COMPLIANT
ORDERING INFORMATION
FPLD54TE1G5 - 622.08MHz
LVPECL
CLOCK
SERIES
CENTER
FREQUENCY
DATASHEET #: Ec229 PAGE 1 OF 2
REV: 02
DATE: 10/27/06
Specifications subject to change without notice.
aCopyright 2001 Connor-Winfield all rights reserved.