EV6090 Datasheet, PDF (7/12 Pages) CML Microcircuits – ADVANCE INFORMATION

CVSD CODEC Evaluation Kit
7
EV6090 Evaluation Kit
3.3.3 S1 and S2 Switch Settings
Switch
S1-C1
S1-C2
S1-C3
S1-C4
S2-C1
S2-C2
S2-C3
Name
CLKMODE1
CLKMODE2
ALGORITHM
DATAEN
/ENCODERFORCEIDLE
DECIN
/DECODERFORCEIDLE
Description
Used in conjunction with
CLKMODE2 to set
sampling rate and source
(internal or external).
Used in conjunction with
CLKMODE1 to set
sampling rate and source
(internal or external).
Determines whether 3-bit
or 4-bit companding
algorithm will be used. In
general, 3-bit companding
yields better results at
rates of 32kbps and
below, while 4-bit
companding should be
used at 48kbps and
above.
This switch is used in
combination with the
/POWERSAVE switch to
determine the state of the
CMX639 encoder output.
This switch causes a
“perfect idle” pattern of
0101… to be present at
encoder output.
This switch selects the
source of the decoder
input signal.
This switch causes a
0101… pattern to be
internally applied to the
CMX639 decoder,
resulting in the decoder
output pin going to V_DD/2.
Circuit Condition When Switch
Is:
ON
OFF
See table on EV6090 for switch
combinations.
See table on EV6090 for switch
combinations.
4-bit algorithm 3-bit algorithm
Encoder
output is at
high
impedance
regardless of
state of
/POWERSAVE
switch.
Encoder
produces idle
pattern at
output.
Decoder input
taken from
PCMCIA
interface.
Decoder
output is
V_DD/2.
Encoder output is
enabled if
/POWERSAVE
switch is OFF,
and is set to V_SS if
it is ON.
Encoder operates
normally.
Decoder input
taken from either
DECIN screw
terminal or
encoder output.
Decoder operates
normally.
2001 MX-COM, Inc.
www.mxcom.com tel: [phone] 744 5050 fax: [phone]
Doc. # 20480218.003
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