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FX643 Datasheet, PDF (4/14 Pages) CML Microcircuits – Call Progress Tone Detector
Call Progress Tone Detector
1.3 Signal List
FX643
Package Package
D4
P1
Signal
Description
Pin No.
2
Pin No.
1
Name
XTAL/CLOCK
3
-
XTALN
4
2
DETECT3
5
3
ENABLE
7
4
DETECT1
10
5
SIGIN
12
6
Vss
13
7
DETECT2
15
8
VDD
1, 6, 8,
-
NC
9, 11,
14, 16
Type
I/P
O/P
O/P
I/P
O/P
I/P
Power
O/P
Power
The external clock input to the clock divider
circuit. Also, the input to the on-chip oscillator,
for external Xtal circuit (D4 package only).
The inverted output of the on-chip oscillator
(D4 package only).
When a single tone within the range of the Call
Progress Band or Non Call Progress Band, or a
Special Information Tone, is detected, this
output goes to a logic "1".
A logic "0" pulse of at least 1µs applied to this
input resets the decoder circuits and forces
DETECT1, DETECT2 and DETECT3 outputs to
a logic "0".
When a call progress signal is detected, this
output goes to a logic "1".
Signal input. Signals to this pin should be ac
coupled. The dc bias of this pin is set internally.
The negative supply rail (ground).
This output is used in conjunction with
DETECT1.
When DETECT1 is at a logic "1", this output
goes to a logic "1" if a Call Progress High Band
signal is detected.
When DETECT1 is at a logic "0", this output
goes to a logic "1" if a Non Call Progress signal
is detected.
The positive supply rail. This pin should be
decoupled to VSS by a capacitor.
Internal connection. Do not make any
connection to these pins.
Notes: I/P = Input
O/P = Output
© 1996 Consumer Microcircuits Limited
4
D/643/4