FX803 Datasheet, PDF (3/17 Pages) Sanyo Semicon Device – DC-DC Converter

Pin Number Function
J/LG/LS DW
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
(Rx) Audio In: The received audio tone signalling input to the Input Amplifier. This input requires to be
a.c. coupled and connected, using external components, to the Signal Input Bias pin. See Figure 2.
Signal Input Bias: External components are required between this input and the (Rx) Audio In pin
See Figure 2.
V_BIAS: The internal circuitry bias line, held at V_DD/2 this pin must be decoupled to V_SS by capacitor C₂
See Figure 2.
Tone 1 Out: Tone 1 Generator (2-/5- tone Selcall or DTMF 1) output. External gain and coupling
components will be required at this output when operating in a complete DBS 800 audio installation.
The frequency of this output is determined by writing to Tx Tone Generator 1 Register (Table 4). See
Figure 2.
Tone 2 Out: Tone 2 Generator (2-/5- tone Selcall, CUES or DTMF 2) output. External gain and
coupling components will be required at this output when operating in a complete DBS 800 audio
installation. The frequency of this output is determined by writing to Tx Tone Generator 2 Register
(Table 5). See Figure 2.
CAL/CUES Out: An auxiliary, selectable tone frequency output, providing a square wave CALibration
signal from Tone 2 Generator or a sine wave CUES (beep) signal from the Summing Amplifier. The
output mode (CAL or CUES) is selected by Bit 14 in the Tx Tone Generator 2 Register (Table 5). In a
DBS 800 audio installation, this output should be connected to the Calibration Input of the FX806
PLMR
Audio
Processor.
When
Tone
Generator
2
is
set
to
V
BIAS
(NOTONE),
the
CAL
output
is
pulled
to
V_BIAS and during a powersave of Tone Generator 2 it is held at V_SS.
Sum In: The input to the on-chip Summing Amplifier. This amplifier is available for combining Tone 1
and Tone 2 outputs (DTMF). Gain and coupling components should be used at this input to provide the
required system gains. See Figures 2 and 3.
Sum Out: The output of the on-chip Summing Amplifier. Combined tones (1 and 2) are available at
this output. See Figures 2 and 3.
Switched Sum Out: The combined tone output available for transmitter modulation. The switch allows
control of the FX803 final output to the FX806. Control of this switch is by Bit 4 of the Control Register.
See Figures 2 and 3.
No internal connection, connect to V .
SS
Serial Clock: The “C-BUS” serial clock input. This clock, produced by the µController, is used for
transfer timing of commands and data to and from the Audio Signalling Processor. See Timing
Diagrams.
V : Positive supply rail. A single +5-volt power supply is required. Levels and voltages within the
DD
Audio Signalling Processor are dependent upon this supply.
NOTE: (i) Further information on external components and DBS 800 system integration of this
microcircuit are contained in the System Support Document.
“C-BUS” is CML’s proprietary standard for the transmission of commands and data between a
µController and DBS 800 microcircuits. It may be used with any µController, and can, if
desired, take advantage of the hardware serial I/O functions embodied into many types of
µController. The “C-BUS” data rate is determined solely by the µController.
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