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CPC5620_1 Datasheet, PDF (4/17 Pages) Clare, Inc. – LITELINK® III Phone Line Interface IC (DAA)
CPC5620/CPC5621
1.2 Performance
Parameter
Minimum Typical Maximum Unit Conditions
DC Characteristics
Operating Voltage VDD
Operating Current IDD
Operating Voltage VDDL
Operating Current IDDL
On-hook Characteristics
3.0
-
5.50
V Low-voltage side
-
9
13
mA Low-voltage side
2.8
-
3.2
V Line side, derived from tip and ring
-
7
8
mA Line side, drawn from tip and ring while off-hook
Metallic DC Resistance
10
Longitudinal DC Resistance
10
Ringing Signal Detect Level
5
Ringing Signal Detect Level
28
Snoop Circuit Frequency Response
166
-
-
MΩ Tip to ring, 100 VDC applied
-
-
MΩ 150 VDC applied from tip and ring to Earth ground
-
-
Vrms 68 Hz ring signal applied tip to ring
-
-
Vrms 15 Hz ring signal applied tip to ring
-
>4000
Hz
-3 dB corner frequency @ 166 Hz, in Clare
application circuit
Snoop Circuit CMRR 1
Ringer Equivalence
Longitudinal Balance 1
Off-Hook Characteristics
AC Impedance
Longitudinal Balance
Return Loss
-
40
-
dB 120 Vrms 60 Hz common-mode signal across tip
and ring
-
0.1B
-
REN
60
-
-
dB Per FCC part 68
-
600
-
40
-
-
-
26
-
Ω
Tip to ring, using resistive termination application
circuit
dB Per FCC part 68
dB Into 600Ω at 1800 Hz
Transmit and Receive Characteristics
Frequency Response
30
-
4000
Hz -3 dB corner frequency 30 Hz
Transhybrid Loss
-
36
-
dB
Into 600Ω at 1800 Hz, with C18 in the resistive
termination application circuit
30 Hz to 4 kHz, for resistive termination application
Transmit and Receive Insertion Loss
-0.4
0
0.4
dB
circuit with MODE de-asserted and for reactive
termination application circuit with MODE
asserted.
Average In-band Noise
-
-126
-
dBm/Hz 4 kHz flat bandwidth
Harmonic Distortion
-
-80
-
dB -3 dBm, 600 Hz, 2nd harmonic
Transmit Level
-
-
2.2
VP-P Single-tone sine wave. Or 0 dBm into 600Ω
Receive Level
-
-
2.2
VP-P Single-tone sine wave. Or 0 dBm into 600Ω
RX+/RX- Output Drive Current
-
-
0.5
mA Sink and source
TX+/TX- Input Impedance
60
90
120
kΩ
Isolation Characteristics
Isolation Voltage
3000
-
-
Vrms Line side to low-voltage side, one minute duration
Surge Rise Time
2000
-
-
V/μS No damage via tip and ring
MODE, OH, and CID Control Logic Inputs
Input Low Voltage
-
-
0.8
VIL
Input High Voltage
2.0
-
-
VIH
High Level Input Current
-
-
-120
μA VIN ≤ VDD
Low Level Input Current
-
-
-120
μA VIN = GND
RING Output Logic Levels
Output High Voltage
VDD -0.4
-
-
V IOUT = -400 μA
Output Low Voltage
-
-
0.4
V
IOUT = 1 mA
Specifications subject to change without notice. All performance characteristics based on the use of Clare application circuits. Functional operation of the device at
conditions beyond those specified here is not implied. All specifications at 25°C and VDD = 5V unless otherwise noted.
1) This parameter is layout and component tolerance dependent.
4
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