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M-984-02 Datasheet, PDF (3/6 Pages) Clare, Inc. – Special Information Tone Detector
M-984-02
Pin Functions
PIN
FUNCTION
XIN
XOUT
Crystal Connection — 3.58 MHz crystal across these pins will produce the timebase needed for proper operation of the
M-984-02. An external clock signal may be fed to XIN providing the clock signal has a duty cycle of 50 ±10% and comes within
0.2 volts of the supply rails. XOUT remains unconnected when an external clock is used.
X358 A buffered output pin. A 3.58 MHz clock signal is available for use in other circuits as a timebase. Leave open when unused.
ENVLP
VSS
VDD
SIGIN
The ENVLP pin is a common detection indicator for the four detect pins. Simply put, the ENVLP is a logical “OR” of the active
detect circuits for each of the four windows, though there is a delay provided to permit ENVLP to latch the first active detect pin.
ENVLP is not tri-state controlled.
The power supply pins, VDD being the most positive. Commonly, VDD is at 3-5 volts, white VSS is at ground.
Analog signal input. (Internally capacitively coupled.)
VREF
VREF is a bias voltage generated in the chip for use in external analog circuits, such as active filters and AC-coupled buffers.
Leave open when unused.
OE
The tri-state control pin. OE places the DET pins in the active mode when at logic “1”. When at logic “0,” OE causes the DET
outputs to appear as high impedance. Should be tied to logic “1” when the M-984-02 is not used in a time-shared bus
application.
D1800
D1400
D950
D400
The detect outputs associated with each window. Tri-state control is available through use of the OE pin.
Timing is shown in the Timing Diagram on page 4.
Rev. 3
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