CPC7695 Datasheet, PDF (18/23 Pages) Clare, Inc. – Line Card Access Switch

CPC7695
switches when pulled to a logic low. Although logically
disabled, an active (closed) ringing switch (SW4) will
remain closed until the next current zero crossing
event.
As shown in the table “Break-Before-Make Operation
Logic Table (Ringing to Talk Transition)” on page 17, this
operation is similar to the one shown in “Alternate
Break-Before-Make Operation Logic Table (Ringing to Talk
Transition)” on page 18, except in the method used to
select the all-off state and when the IN_RINGING,
IN_TESTin and IN_TESTout inputs are reconfigured for the
talk state.
1. Pull T_SD to a logic low to end the ringing state.
This opens the ringing return switch (SW3) and
prevents any other switches from closing.
2. Keep T_SD low for at least one-half the duration of
the ringing cycle period to allow sufficient time for
a zero crossing current event to occur and for the
circuit to enter the break before make state.
3. During the T_SD low period, set the IN_RINGING,
IN_TESTin and IN_TESTout inputs to the talk state
(0,0,0).
4. Release T_SD allowing the internal pull-up to
activate the break switches.
When using T_SD as an input, the two recommended
states are “0” which over rides logic input pins and
forces an all-off state and “Z” which allows switch
control via the logic input pins. This requires the use of
an open-collector or open-drain type buffer.
Alternate Break-Before-Make Operation Logic Table (Ringing to Talk Transition)
State IN_RINGING IN_TESTin IN_TESTout Latch
T_SD
Timing
Break
Switches
Ringing
Return
Switch
(SW3)
Ringing
Switch
(SW4)
Test
Switches
Ringing 1
0
0
0
Z
-
Off
On
On
Off
Hold this state for at least
All-off
1
0
1
one-half of ringing cycle.
SW4 waiting for zero current
Off
Off
On
Off
X
0
to turn off.
Break-
Before- 0
0
0
Make
Zero current has occurred.
SW4 has opened
Off
Off
Off
Off
Talk
0
0
0
0
Z
Break switches close.
On
Off
Off
Off
* For the CPC7695xA/B versions the input pattern (1,1,1) may also be used for the all-off state.
2.4 Data Latch
The CPC7695 has an integrated transparent data
latch. The latch enable operation is controlled by TTL
logic input levels at the LATCH pin. Data input to the
latch are via the input pins, while the output of the data
latch are internal nodes used for state control. When
the LATCH enable control pin is at logic 0 the data
latch is transparent and the input data control signals
flow directly through the latch to the state control
circuitry. A change in input will be reflected by a
change in switch state. Whenever the LATCH enable
control pin is at logic 1, the latch is active and data is
locked. Subsequent input changes will not result in a
change to the control logic or affect the existing switch
state.
Switches will remain in the state they were in when the
LATCH pin changes from logic 0 to logic 1 and will not
respond to changes in input as long as the latch is at
logic 1. However, neither the T_SD input nor the T_SD
output control functions are affected by the latch
function. Internal thermal shutdown control and
external “All-off” control via T_SD is not affected by the
state of the LATCH enable input.
2.5 T_SD Pin Description
The T_SD pin is a bi-directional I/O structure with an
internal pull up sourced from V_DD. As an output, this
pin indicates the status of the thermal shutdown
circuitry. Typically, during normal operation, this pin will
be pulled up to V_DD but under fault conditions that
create excess thermal loading the CPC7695 will enter
thermal shutdown and a logic low will be output.
18
PRELIMINARY
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