CS1600_1007 Datasheet, PDF (9/18 Pages) Cirrus Logic – LOW-cost PFC Controller for Electronic Ballasts

CS1600
4.1.2 Burst Mode
In addition to the start-up mode and normal mode of operation,
the controller enters the burst mode of operation when the
estimated output power (P_O) is < 5% of its nominal value.
During this stage, the PFC driver is disabled intermittently over
a full line cycle period, as shown in Figure 12. The period of
time for which the PFC drive is disabled depends on the level
of loading present..
P_O
[W]
5%
Burst Mode
Active
t [ms]
V_in
[V]
V_in
PFC
Disable
FET V_gs
I_ref = Target Reference current used for feedback
V_link
I_FB
R_FB
VDD
7
R_IFB
15k
FB
4
ADC
Figure 13. Output Feedback
V_link
I_FB
R_FB
VDD
7
t [ms]
Figure 12. Burst Mode of Operation
4.2 Input Feedforward and Output
Regulation
The CS1600 continuously monitors the rectified AC line and
the PFC output voltage through sense resistors tied to the IAC
and the FB pins to monitor the voltages, scaled as currents.
The rectified AC line sense resistor R_AC needs to be the same
size of the resistor R_FB used for current feedback from the
PFC output voltage. These currents are effectively compared
against an internal reference current to provide adaptive PFC
control. The resistor values are calculated as follows:
R_FB
=
V_{-----l-i-n---k----–-----}V_----D----D--
I_ref
[Eq.1]
R_AC = R_FB
[Eq.2]
where
R_FB = Feedback resistor used to sense the PFC output
voltage
R_AC = Feedforward resistor used to sense the rectified line
voltage
V_link= PFC Output Voltage
V_DD = IC Supply Voltage
R_IFB
15k
FB
4
ADC
Figure 14. Input Feedforward
4.3 Protection Features
4.3.1 Overvoltage Protection
If the PFC output voltage, V_link, exceeds the overvoltage
threshold, as scaled by the current monitored by the sense
resistors, the CS1600 provides protection by disabling the
gate drive. A nominal hysteresis is provided to allow the
system to recover from the fault condition, before switching is
resumed.
4.3.2 Overcurrent Protection
The CS1600’s digital controller algorithm limits the ON
time of the Power MOSFET by the following equation:
T
on
≤
0_----._-0_----0_---1_----1_---2_---6_--
V_rect
Where T_on is the max time that the power MOSFET is
turned on and V_rect is the rectified line voltage. In the
event of a sudden line surge or sporadic, high dv/dt line
voltages, this equation may not limit the ON time appro-
priately. For this type of line disturbance, additional pro-
tection mechanisms, such as fusible resistors, fast-blow
fuses, or other current-limiting devices, are recommend-
ed.
DS904A7
9