CDB5471 Datasheet, PDF (9/26 Pages) Cirrus Logic – Evaluation Board and Software

CDB5471
ate CS5451 by obtaining a CS5451 sample and
connect it in place of the CS5471 device. Then the
remaining four input channels serve as the inputs to
the CS5451’s four additional input pairs.
Other header options listed in Table 2 allow the
user to set the source of the input clock signal and
the source of the voltage reference (VREFIN) in-
put, etc. The voltage reference options and clock
input options are discussed next.
2.3.2 Voltage Reference Input
To supply the CS5471 with a suitable 1.2 V voltage
reference input at the VREFIN pin, the evaluation
board provides three voltage reference options: on-
chip, on-board, and external. See HDR14 as shown
in Figure 1. Table 3 illustrates the available voltage
reference settings for HDR14. With HDR14’s
Reference
Description
LT1004
Select on board
LT1004 Reference
(5 ppm/°C)
Select reference sup-
VREFOUT plied from CS5471
VREFOUT pin
EXTVREF
Select external
reference
HDR14
OO
LT1004
O O VREFOUT
O O EXT VREF
O O LT1004
O O VREFOUT
O O EXT VREF
O O LT1004
O O VREFOUT
O O EXT VREF
Table 3. Reference Selection
jumpers in position “VREFOUT,” the CS5471’s
on-chip reference provides 1.2 volts. With HDR14
set to position “LT1004,” the LT1004 provides
1.23 volts (the LT1004 temperature drift is typical-
ly 50 ppm/°C). By setting HDR14’s jumpers to po-
sition “EXT VREF,” the user can supply an
external voltage reference to J16 connector post
(VREF) and AGND inputs.
2.3.3 Clock Source for XIN
A 4.000 MHz crystal is provided to drive the XIN
input of the CS5471. (See Figure 1.) However, the
user has the option to provide an external oscillator
signal for XIN, by switching the setting of HDR15.
2.3.4 S1 DIP Switch
Referring to Figure 3, the two single-pole single-
throw switches on SW1 DIP switch should be used
to control the logic settings on the CS5471’s
OWRS pin and GAIN pin. When these SW1
switches are set to “OPEN” the corresponding pin
on CS5471 is set to D+ potential, which creates a
logic-high state. When the user closes either of
these SW1 switches, the corresponding pin on
CS5471 is grounded, which creates a logic-low
state on the pin.
2.3.5 Reset Circuit
Circuitry has been provided which allows the user
to execute a hardware reset on the CS5471. (See
Figure 3). By pressing on the S1 switch, the RE-
SET pin on the CS5471 will be held low until the
switch is released.
2.3.6 External Signal In/Out Header
Note that HDR16 is included on the CDB5471
Evaluation Board as a header that is normally left
unconnected. This header provides a way for the
user to interface the CDB5471 Evaluation Board to
other prototype boards, calibrators, logic analyzers,
other peripherals, etc. in order to further evaluate
the CS5471 device and/or to use the evaluation
board as a platform for the prototype development
of a digital power metering solution. However,
note that the CDB5471 Evaluation Board is not in-
tended to be integrated directly into a commercial
digital power meter. The layout of the board is not
optimized for practical power metering situations.
2.3.7 Serial-to-Parallel Interface
Glue-logic on the evaluation board converts the
CS5471 serial data into 8-bit segments (bytes).
The bytes are sent to the DB25 connector (J17), and
then through the standard printer cable to the user’s
PC. This section briefly describes the operation of
the digital circuitry on the CDB5471 that provides
the 8-bit parallel data to the PC. Refer to Figure 3.
DS480DB1
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