CS8405A Datasheet, PDF (8/36 Pages) Cirrus Logic – 96 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER

CS8405A
SWITCHING CHARACTERISTICS - CONTROL PORT - Two-Wire MODE
(Note 13, T_A = 25 °C for suffixes ‘CS’ &’CZ’, T_A = -40 to 85°C for ‘IS’ & ‘IZ’ ; VD+ = VL+ = 5V ±10%, Inputs: Logic 0
= 0V, Logic 1 = VL+; C_L = 20pF)
Parameter
Symbol Min Typ Max Units
SCL Clock Frequency
f_scl
-
-
100
kHz
Bus Free Time Between Transmissions
t_buf
4.7
-
-
µs
Start Condition Hold Time (prior to first clock pulse)
t_hdst
4.0
-
-
µs
Clock Low Time
t_low
4.7
-
-
µs
Clock High Time
t_high
4.0
-
-
µs
Setup Time for Repeated Start Condition
t_sust
4.7
-
-
µs
SDA Hold Time from SCL Falling
(Note 14) t_hdd
0
-
-
µs
SDA Setup Time to SCL Rising
t_sud
250
-
-
ns
Rise Time of Both SDA and SCL Lines
t_r
-
-
25
ns
Fall Time of Both SDA and SCL Lines
t_f
-
-
25
ns
Setup Time for Stop Condition
t_susp
4.7
-
-
µs
Notes: 13. Two-Wire Mode is compatible with the I²C^® protocol and is supported only at 5V mode.
14. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Stop Start
Repeated
Start
SDA
SCL
t _buf
t _hdst
t _high
t _hdst
tf
t
low
t _hdd
t _sud
t _sust
tr
Stop
t _susp
Figure 4. Two-Wire Mode timing
8
DS469PP4