WM8213 Datasheet, PDF (7/38 Pages) Wolfson Microelectronics plc – 24MSPS 16-bit CCD Digitiser

Production Data
WM8213
Test Conditions
AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 24MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
Reset-Level Clamp (RLC) circuit/ Reference Level DAC
RLC switching impedance
50
VRLC short-circuit current
2
VRLC output resistance
2
VRLC Hi-Z leakage current
VRLC = 0 to AVDD
1
Reference RLCDAC resolution
4
Reference RLCDAC step size
VRLCSTEP
AVDD=3.3V
RLCDACRNG=0
0.173
Reference RLCDAC step size
Reference RLCDAC output
voltage at code 0(hex)
VRLCSTEP
VRLCBOT
RLCDACRNG=1
AVDD=3.3V,
RLCDACRNG=0
0.11
0.4
Reference RLCDAC output
VRLCBOT
RLCDACRNG=1
0.4
voltage at code 0(hex)
Reference RLCLDAC output
VRLCTOP
AVDD=3.3V,
3.0
voltage at code F(hex)
RLCDACRNG=0
Reference RLCDAC output
voltage at code F(hex)
VRLCTOP
RLCDACRNG = 1
2.05
RLCDAC
DNL
-0.5
+0.5
RLCDAC
INL
+/-1
UNIT
Ω
mA
Ω
µA
bits
V/step
V/step
V
V
V
V
LSB
LSB
Offset DAC, Monotonicity Guaranteed
Resolution
Differential non-linearity
DNL
Integral non-linearity
INL
Step size
Output voltage
Programmable Gain Amplifier
Resolution
Gain equation
Max gain, each channel
Min gain, each channel
Channel Matching
Analogue to Digital Converter
Resolution
Speed
Full-scale input range
(2*(VRT-VRB))
GMAX
GMIN
Code 00(hex)
Code FF(hex)
LOWREFS=0
LOWREFS=1
8
0.1
0.25
2.04
-260
+260
bits
0.5
LSB
1
LSB
mV/step
mV
mV
9
bits
0.66 + ^7.34 * PGA[ 8 : 0 ]
V/V
511
8
V/V
0.66
V/V
1
5
%
16
bits
24
MSPS
2
V
1.2
V
w
PD Rev 4.1 July 2008
7