CS42435_07 Datasheet, PDF (47/57 Pages) Cirrus Logic – 108 dB, 192 kHz 4-In, 8-Out TDM CODEC

CS42435
7.14 Status Mask (Address 1Ah)
7
Reserved
6
Reserved
5
Reserved
4
Reserved
Default = 0000
3
CLK Error_M
2
Reserved
1
ADC2_OVFL_M
0
ADC1_OVFL_M
Function:
The bits of this register serve as a mask for the error sources found in the register “Status (Address 19h)
(Read Only)” on page 46. If a mask bit is set to 1, the error is unmasked, meaning that its occurrence will
affect the status register. If a mask bit is set to 0, the error is masked, meaning that its occurrence will not
affect status register. The bit positions align with the corresponding bits in the Status register.
DS685F2
47