CS8422_09 Datasheet, PDF (44/82 Pages) Cirrus Logic – 24-bit, 192-kHz, Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver

CS8422
10.REGISTER QUICK REFERENCE
This table shows the register names and default values for read-write registers.
Addr Function
01h Chip ID &
Version
02h Clock Control
7
ID4
0
PDN
1
03h Receiver Input
Control
RX_MODE
0
04h Receiver Data
Control
TRUNC
0
05h GPO Control 1 _GPO0SEL3
0
06h GPO Control 2 _GPO2SEL3
0
07h SAI Clock Con-
trol
SAI_CLK3
0
08h SRC SAO
Clock Control
SAO_CLK3
0
09h RMCK Cntl.&
Misc.
RMCK3
0
0Ah Data Routing
Control
SDOUT1_1
0
0Bh SAI Data
Format
SIMS
0
0Ch SAO1 Data For-
mat & TDM
SOMS1
0
0Dh SAO2 Data For-
mat
SOMS2
0
0Eh
RERR Unmask-
ing
ACTIVEM
0
0Fh Interrupt
Unmasking
PCCHM
0
10h Interrupt Mode _Reserved
0
6
ID3
0
FSWCLK
0
RXSEL1
0
HOLD1
0
GPO0SEL2
0
GPO2SEL2
0
SAI_CLK2
1
SAO_CLK2
1
RMCK2
0
SDOUT1_0
0
SISF
0
SOSF1
0
SOSF2
0
QCRCM
0
OSLIPM
0
Reserved
0
5
ID2
0
SWCLK
0
RXSEL0
0
HOLD0
0
GPO0SEL1
0
GPO2SEL1
0
SAI_CLK1
0
SAO_CLK1
1
RMCK1
0
SDOUT2_1
0
SIFSEL2
0
SORES1_1
0
SORES2_1
0
CCRCM
0
DETCM
0
Reserved
0
4
3
2
ID1
ID0
REV2
1
RMCK_
CTL1
0
TXSEL1
0
CHS
0
GPO0SEL0
0
GPO2SEL3
0
0
RMCK_
CTL0
0
TXSEL0
1
DETCI
0
GPO1SEL3
0
GPO3SEL2
0
0
INT1
0
INPUT_
TYPE
0
EMPH_
CNTL2
1
GPO1SEL2
0
GPO3SEL1
0
SAI_CLK0 SAI_MCLK Reserved
0
SAO_CLK0
0
RMCK0
0
SDOUT2_0
1
0
SAO_
MCLK
0
SRC_
MUTE
1
MUTE_
SAO1
0
0
SRC_
MCLK1
0
Reserved
0
MUTE_
SAO2
0
SIFSEL1 SIFSEL0 Reserved
0
0
0
SORES1_0 SOFSEL1_1 SOFSEL1_0
0
0
0
SORES2_0 SOFSEL2_1 SOFSEL2_0
0
0
0
UNLOCKM
VM
CONFM
0
0
0
CCHM
RERRM
QCHM
0
0
0
Reserved
RERR1
RERR0
0
0
0
1
REV1
0
INT0
0
Reserved
0
EMPH_
CNTL1
0
GPO1SEL1
0
GPO3SEL0
0
Reserved
0
SRC_
MCLK2
0
Reserved
0
SRCD
0
Reserved
0
TDM1
0
Reserved
0
BIPM
0
FCHM
0
SRC_
UNLOCK1
0
0
REV0
0
Reserved
0
Reserved
0
EMPH_
CNTL0
0
GPO1SEL0
0
GPO3SEL3
0
Reserved
0
SRC_DIV
0
Reserved
0
Reserved
0
Reserved
0
TDM0
0
Reserved
0
PARM
0
SRC_
UNLOCKM
0
SRC_
UNLOCK0
0
Table 6. Summary of Software Register Bits
44
DS692PP2