CS4202 Datasheet, PDF (40/68 Pages) Cirrus Logic – Audio Codec 97 with headphone Amplifier

CS4202
4.26 BIOS-Driver Interface Control Registers (Index 70h - 72h)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0
E[15:0]
Event Configuration. The E[15:0] bits control the BIOS-Driver Interface mechanism.
Default
0000h
The BDI Config Register (Index 70h) enables BIOS-Driver communication for each possible event. If a bit is ‘0’, the
corresponding event will not be communicated. If a bit is ‘1’, the corresponding event will be communicated by as-
serting the BDI bit in input slot 12. If an event occurs, the BIOS will ‘set’ the corresponding bit in the BDI Status Reg-
ister (Index 7Ah). This bit remains ‘set’ until it is cleared by the driver, acknowledging the event has been handled.
This behavior is equivalent to “non-sticky” (level sensitive) GPIO input pins.
The BDI Wakeup Register (Index 72h) provides a mask for determining if a BDI event will generate a wakeup or
GPIO_INT. If a bit is ‘0’, the corresponding event will not generate an interrupt. If a bit is ‘1’, the corresponding event
will generate an interrupt. Refer to the GPIO Pin Wakeup Mask Register (Index 52h) for details about wakeup inter-
rupts.
4.27 BIOS-Driver Interface Status Register (Index 7Ah)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0
E[15:0]
Event Status. This register, in conjunction with the BIOS-Driver Interface Control Registers
(Index 70h - 72h), controls the BIOS-Driver Interface mechanism.
Default
0000h
The BDI Status Register (Index 7Ah) reflects the state of all possible events. If a bit is ‘0’, the corresponding event
has not occurred or has already been handled by the driver. If a bit is ‘1’, the corresponding event has occurred and
has not been handled by the driver yet. The BDI bit in input slot 12 is a logic OR of all bits in this register ANDed
with their corresponding bit in the BDI Config Register (Index 70h). After handling an event, the driver should clear
it by writing a ‘0’ to the corresponding bit of this register.
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