WM8768 Datasheet, PDF (31/38 Pages) Wolfson Microelectronics plc – 24-bit, 192kHz 8-Channel DAC

Production Data
WM8768
DAC DIGITAL VOLUME CONTROL
The DAC volume may also be adjusted in the digital domain using independent digital attenuation
control registers
REGISTER
ADDRESS
0000000
Digital
Attenuation
DACL1
0000001
Digital
Attenuation
DACR1
0000100
Digital
Attenuation
DACL2
0000101
Digital
Attenuation
DACR2
0000110
Digital
Attenuation
DACL3
0000111
Digital
Attenuation
DACR3
0001101
Digital
Attenuation
DACL4
0001110
Digital
Attenuation
DACR4
0001000
Master
Digital
Attenuation
(all channels)
BIT
LABEL
DEFAULT
DESCRIPTION
7:0 LDA1[7:0] 11111111 Digital Attenuation data for Left channel DACL1 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA1 in intermediate latch (no change to output)
1: Store LDA1 and update attenuation on all channels
7:0 RDA1[6:0] 11111111 Digital Attenuation data for Right channel DACR1 in 0.5dB steps.
(0dB)
See Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA1 in intermediate latch (no change to output)
1: Store RDA1 and update attenuation on all channels.
7:0 LDA2[7:0] 11111111 Digital Attenuation data for Left channel DACL2 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA2 in intermediate latch (no change to output)
1: Store LDA2 and update attenuation on all channels.
7:0 RDA2[7:0] 11111111 Digital Attenuation data for Right channel DACR2 in 0.5dB steps.
(0dB)
See Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA2 in intermediate latch (no change to output)
1: Store RDA2 and update attenuation on all channels.
7:0 LDA3[7:0] 11111111 Digital Attenuation data for Left channel DACL3 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA3 in intermediate latch (no change to output)
1: Store LDA3 and update attenuation on all channels.
7:0 RDA3[7:0] 11111111 Digital Attenuation data for Right channel DACR3 in 0.5dB steps.
(0dB)
See Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA3 in intermediate latch (no change to output)
1: Store RDA3 and update attenuation on all channels.
7:0 LDA3[7:0] 11111111 Digital Attenuation data for Left channel DACL4 in 0.5dB steps. See
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store LDA4 in intermediate latch (no change to output)
1: Store LDA4 and update attenuation on all channels.
7:0 RDA3[7:0] 11111111 Digital Attenuation data for Right channel DACR4 in 0.5dB steps.
(0dB)
See Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store RDA4 in intermediate latch (no change to output)
1: Store RDA4 and update attenuation on all channels.
7:0
MASTDA
11111111 Digital Attenuation data for all DAC channels in 0.5dB steps. See
[7:0]
(0dB)
Table 16
8
UPDATE Not latched Controls simultaneous update of all Attenuation Latches
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
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PD Rev 4.3 July 2010
31