CS5333 Datasheet, PDF (3/20 Pages) Cirrus Logic – 24-Bit, 96 kHz Stereo A/D Converter

CS5333
LIST OF FIGURES
Figure 1. SCLK to LRCK and SDATA, Slave Mode ........................................................................ 9
Figure 2. SCLK to LRCK and SDATA, Master Mode ...................................................................... 9
Figure 3. Typical Connection Diagram.......................................................................................... 10
Figure 4. Base-Rate Stopband Rejection...................................................................................... 14
Figure 5. Base-Rate Transition Band............................................................................................ 14
Figure 6. Base-Rate Transition Band (Detail) ............................................................................... 14
Figure 7. Base-Rate Passband Ripple.......................................................................................... 14
Figure 8. High-Rate Stopband Rejection ...................................................................................... 14
Figure 9. High-Rate Transition Band............................................................................................. 14
Figure 10. High-Rate Transition Band (Detail) .............................................................................. 15
Figure 11. High-Rate Passband Ripple......................................................................................... 15
Figure 12. Line Input Test Circuit .................................................................................................. 15
Figure 13. CS5333 - Serial Audio Format 0 .................................................................................. 16
Figure 14. CS5333 - Serial Audio Format 1 .................................................................................. 16
LIST OF TABLES
Table 1. Common Clock Frequencies........................................................................................... 11
Table 2. Digital Interface Format - DIF.......................................................................................... 12
DS520PP1
3