CS4412A_08 Datasheet, PDF (3/24 Pages) Cirrus Logic – 30 W Quad Half-Bridge Digital Amplifier Power Stage

1. PIN DESCRIPTION
CS4412A
48 47 46 45 44 43 42 41 40 39 38 37
CNFG0 1
CNFG1 2
CNFG2 3
IN1 4
IN2 5
IN3 6
IN4 7
RST12 ₈
LVD ₉
GND ₁₀
VD_REG ₁₁
VD ₁₂
Thermal Pad
Top-Down (Through Package) View
48-Pin QFN Package
36 VP
35 OUT1
34 PGND
33 PGND
32 OUT2
31 VP
30 ^VP
29 ^OUT3
28 ^PGND
27 ^PGND
26 ^OUT4
25 ^VP
13 14 15 16 17 18 19 20 21 22 23 24
Pin Name
CNFG0
CNFG1
CNFG2
IN1
IN2
IN3
IN4
RST12
RST34
LVD
VD_REG
VD
OCREF
Pin #
1
2
3
4
5
6
7
8
46
9
11
12
21
Pin Description
Out Configuration Select (Input) - Used to set the PWM output configuration mode. See “Output
Mode Configuration” on page 15.
PWM Input (Input) - Logic-level switching inputs from a PWM modulator.
Reset Input (Input) - Reset inputs for channels 1/2 and 3/4, respectively. Active low.
VD Voltage Level Indicator (Input) - Identifies the voltage level attached to VD. When applying
5.0 V to VD, LVD must be connected to VD. When applying 2.5 V or 3.3 V to VD, LVD must be
GND.
Core Digital Power (Output) - Internally generated low voltage power supply for digital logic.
Digital Power (Input) - Positive power supply for the internal regulators and digital I/O.
Over-current Reference (Input) - Sets over-current trigger level. Connect pin through a resistor
to GND. See “Device Protection and Error Reporting” on page 19. This pin should not be left float-
ing.
DS786A2
3