CS4353_09 Datasheet, PDF (3/26 Pages) Cirrus Logic – 3.3 V Stereo Audio DAC with 2 VRMS Line Output

CS4353
LIST OF FIGURES
Figure 1.Serial Input Timing ........................................................................................................................ 9
Figure 2.Power-on Reset Threshold Sequence ........................................................................................ 10
Figure 3.Typical Connection Diagram ....................................................................................................... 12
Figure 4.Stereo Pseudo-differential Output ............................................................................................... 13
Figure 5.I²S, up to 24-bit Data ................................................................................................................... 15
Figure 6.Left-justified up to 24-bit Data ..................................................................................................... 15
Figure 7.De-emphasis Curve, Fs = 44.1 kHz ............................................................................................ 16
Figure 8.Internal Power-on Reset Circuit .................................................................................................. 16
Figure 9.Initialization and Power-down Sequence Diagram ..................................................................... 18
Figure 10.Single-speed Stopband Rejection ............................................................................................. 21
Figure 11.Single-speed Transition Band ................................................................................................... 21
Figure 12.Single-speed Transition Band (detail) ....................................................................................... 21
Figure 13.Single-speed Passband Ripple ................................................................................................. 21
Figure 14.Double-speed Stopband Rejection ........................................................................................... 21
Figure 15.Double-speed Transition Band ................................................................................................. 21
Figure 16.Double-speed Transition Band (detail) ..................................................................................... 22
Figure 17.Double-speed Passband Ripple ............................................................................................... 22
Figure 18.Quad-speed Stopband Rejection .............................................................................................. 22
Figure 19.Quad-speed Transition Band .................................................................................................... 22
Figure 20.Quad-speed Transition Band (detail) ........................................................................................ 22
Figure 21.Quad-speed Passband Ripple .................................................................................................. 22
LIST OF TABLES
Table 1. Digital I/O Pin Characteristics ..................................................................................................... 11
Table 2. CS4353 Operational Mode Auto-Detect ...................................................................................... 14
Table 3. Single-speed Mode Standard Frequencies ................................................................................. 14
Table 4. Double-speed Mode Standard Frequencies ............................................................................... 14
Table 5. Quad-speed Mode Standard Frequencies .................................................................................. 14
Table 6. Digital Interface Format ............................................................................................................... 15
DS803F1
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