CDB3318 Datasheet, PDF (3/16 Pages) Cirrus Logic – Evaluation Board for CS3318

CDB3318
1. SYSTEM OVERVIEW
The CDB4265 evaluation board is an excellent means for evaluating the CS3318 digitally controlled analog volume
control. Analog audio signal interfaces are provided, an on-board microcontroller and USB/RS-232 PC interface is
used for easily configuring the CS3318’s internal registers, and a USB cable is included for use with the FlexGUI
Windows configuration software.
The CDB3318 schematic set is shown in Figure 8 through Figure 10.
1.1 Power
Power (±8 V to ±9 V) must be supplied to the evaluation board through the red VA+ and green VA- binding
posts. An on-board regulator provides a 3.3 V supply to the digital circuitry. All voltage inputs must be ref-
erenced to the single black binding post ground connector (see the System Connections table on page 8).
WARNING: Please refer to the CS3318 data sheet for allowable voltage levels.
1.2 Grounding and Power Supply Decoupling
The CS3318 requires careful attention to power supply and grounding arrangements to optimize perfor-
mance. Figure 7 on page 9 provides an overview of the connections to the CS3318. Figure 11 on page 13
shows the component placement. Figure 12 on page 14 shows the top layout. Figure 13 on page 15 shows
the bottom layout. The decoupling capacitors are located as close to the CS3318 as possible. Extensive
use of ground plane fill in the evaluation board yields large reductions in radiated noise.
1.3 CS3318 Analog Volume Control
A complete description of the CS3318 is included in the CS3318 product data sheet.
The required configuration settings of the CS3318 are achieved via its control port registers, accessible
through the CS3318 tab of the Cirrus Logic FlexGUI software. A register-level configuration interface is pro-
vided on the Register Maps tab. See the “PC Software Control” section on page 5 for more information.
1.4 External Control Headers
The evaluation board has been designed to allow interfacing with external systems via the headers J17,
J88, and J89.
The 15-pin, 3 column header, J17, provides bidirectional access to the CS3318’s SPI^TM/I²C^® and MUTE
digital control signals. The pins located in the column labeled “PC” connect to the on-board PC interface
circuitry, and those in the column labeled “In” connect directly to the CS3318’s digital control I/O pins. By
default, shunts are populated across these rows, connecting the PC interface to the CS3318’s digital control
I/O. To use an external digital control source, simply remove the shunts and connect a ribbon cable to the
“In” position. A single “GND” column for the ribbon cable’s ground connection is provided to maintain signal
integrity. Two unpopulated pull-up resistors are also available should the CDB3318 be required to provide
the pull-up function for the I²C bus.
The 10-pin, 2 column header, J89, provides bidirectional access to the CS3318’s I²C SDA and SCL signals,
as well as unidirectional output access to the CS3318’s AD0, ENOut, and MUTE signals. The SDA and SCL
signals are connected directly to their corresponding pins on the CS3318, as well as those on J17 described
above. The AD0, ENOut, and MUTE signals are re-driven versions of these signals as present directly on
their respective I/O pins on the CS3318. This header may be used to connect the serial control signals be-
tween 2 or more CDB3318’s (out of J89 on one and in to J17 on another) for multiple CS3318 I²C serial
control evaluation.
DS693DB2
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