CS5336 Datasheet, PDF (26/34 Pages) Cirrus Logic – 16-Bit, Stereo A/D Converters for Digital Audio

CDB5336,8,9
VD+
10 k SIP
142567893
OCLKD ^P4
VD+
P3
CBL
+ C34
1 uF
V
R16 20 k
C
R17 20 k
U
19
VD+
C24
0.1 uF18 _GND
15 _CBL
9V
10
C
11
U
5
6
MCK
SCK
____ ₂
PRO
__ __ ₁
C7/C3
__
3
C1/FC0
__ __ ₄
C6/C2
CS8402
__ ___ ₁₂
C9/C15
U2
__ ₁₃
EM1/C8
__ ₁₄
EM0/C9
24
CRE/FC1
DIPSW 8
SW 2
3
14
2
15
4
13
5
12
6
11
8
9
7
10
1
16
R18 20 k
VD+
21 _M0
22 _M1
23 _M2
SDATA
8
FSYNC
7
____ ₁₆
RST
20 ^R19
TXP
110
17
TXN
___
RST
1
3
R20
2
4
SCHOTT 67125450
CS5336
FSYNC
SDATA
12
11
13 U8D
74HC08
13
9
RESET2
12
Q2
D2
74HC74
U12B
8 ^__
11
CLK
Q2 _SET2
10
PULSE PE65612
_
L/R CS5336
FSYNC CS5336
R11
47 k
+5 V
Figure 4. CS8402 Digital Audio Line Driver Connections
puts are buffered, as shown in Figure 5, in order
to isolate the converter from the digital signal
processor. If slave mode is selected by pulling
SMODE low, then U9 (74HC243) will change to
the opposite direction, and act as an input buffer.
U9 is provided to protect against inadvertent ex-
ternal driving of SCLK, L/R and FSYNC while
in MASTER mode. U9 is not necessary in your
application circuit.
Jumper P4 allows the board to be configured for
either the CS5336/38, or the CS5339, which
have opposite polarities of SCLK.
Parallel Output Interface
Figure 6 depicts the parallel output interface on
the evaluation board. 16-bit words are assembled
from the serial data output of the converter. Each
bit of serial data is clocked out of the converter
3-64
DS23DB5