CS4364_08 Datasheet, PDF (26/50 Pages) Cirrus Logic – 103 dB, 192 kHz 6-Channel D/A Converter

DSD Normal Mode
Not Used
CS4364
DSD Phase
Modulation Mode
DSD_SCLK
BCKA
(128Fs)
BCKA
(64Fs)
DSD_SCLK
DSD_SCLK
BCKD
(64Fs)
Not Used
D0
D1
D1
D2
DSDAx,
DSDBx
DSDAx,
DSDBx
D0
D1
D2 Not Used
Figure 18. DSD Phase Modulation Mode Diagram
4.9 Grounding and Power Supply Arrangements
As with any high resolution converter, the CS4364 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. The Typical Connection Diagram shows the rec-
ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground
planes are split between digital ground and analog ground, the GND pins of the CS4364 should be connect-
ed to the analog ground plane.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted
coupling into the DAC.
4.9.1
Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should be located on the same
layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same
supply, but a decoupling capacitor should still be placed on each supply pin.
Note: All decoupling capacitors should be referenced to analog ground.
The CDB4364 evaluation board demonstrates the optimum layout and power supply arrangements.
4.10 Analog Output and Filtering
The CS4364 does not include phase or amplitude compensation for an external filter. Therefore, the DAC
system phase and amplitude response will be dependent on the external analog circuitry.
Figure 19 shows how the full-scale analog output level specification is derived.
Figure 20 shows how the recommended output filtering with location for optional mute circuit.
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