CS5505_09 Datasheet, PDF (23/40 Pages) Cirrus Logic – Very Low Power, 16-Bit and 20-Bit A/D Converters

CS5505/6/7/8
CS5505/6/7/8
analog ground pin. No analog ground pin is re-
quired because the inputs for measurement and
for the voltage reference are differential and re-
quire no ground. In the digital section of the
chip the supply current flows into the VD+ pin
and out of the DGND pin. As a CMOS device,
the CS5505/6/7/8 requires that the supply volt-
age on the VA+ pin always be more positive
than the voltage on any other pin of the device.
If this requirement is not met, the device can
latch-up or be damaged. In all circumstances the
VA+ voltage must remain more positive than the
VD+ or DGND pins; VD+ must remain more
positive than the DGND pin.
The following power supply options are possi-
ble:
VA+ = +5V to +10V, VA- = 0V, VD+ = +5V
VA+ = +5V,
VA- = -5V, VD+ = +5V
VA+ = +5V, VA- = 0V to -5V, VD+ = +3.3V
The CS5505/6/7/8 cannot be operated with a
3.3V digital supply if VA+ is greater than
+5.5V.
10Ω
+5V
Analog
Supply
0.1 µF
17
VA+
Calibration
Control
4 _CAL
0.1 µF
20
VD+
5
XIN
6
XOUT
Optional
Clock
Source
32.768 kHz
Bipolar/
Unipolar
Input Select
8
BP/UP
7
M/SLP
CS5505/6
Analog*
Signal
Sources
Signal
Ground
9
10
12
13
11
*Unused analog inputs
AIN1+
AIN2+
AIN3+
AIN4+
AIN-
21
SCLK
22
SDATA
DRDY ²³
should be tied to AIN-
14
Voltage ⁺
Reference
15
-
16
VREF+
VREF-
VREFOUT
CS ²
1
A0
A1
24
CONV ³
DGND ¹⁹
VA-
18
Sleep Mode
Control
and
Output Mode
Select
Serial
Data
Interface
Control
Logic
Unused Logic
inputs must be
connected to
VD+ or DGND.
Note: To use the internal 2.5 volt reference see Figure 6.
Figure 14. CS5505/6 System Connection Diagram Using External Reference, Single Supply
DS59F64
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