CS2300-03 Datasheet, PDF (2/3 Pages) Cirrus Logic – 1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

1. PIN DESCRIPTIONS
Pin Name
VD
GND
PLL_OUT
AUX_OUT
CLK_IN
FILTP
FILTN
CLK/PLL
M1
M0
# Pin Description
1 Digital Power
2 Ground
3 PLL Clock Output
4 AUX Output
5 Clock Input
6 LCO Filter Connections
7
8 AUX Output Source Selection Input
9 Mode Selection Inputs
10
See the CS2300-OTP datasheet for additional pin de-
scription information.
CS2300-03
2. SPECIFICATIONS
Please see the CS2300-OTP datasheet for package in-
formation, device characteristics, and specifications ex-
cept where noted due to specific programming options.
3. OPERATIONAL INFORMATION
Complete operational information can be found in the
CS2300-OTP datasheet. Specific operational details
dictated by the programming of the CS2300-03 are in-
cluded below.
• The PLL clock output is forced to 0 when the PLL is
unlocked, both upon loss of the CLK_IN signal or
briefly when switching mode pin configurations.
• The minimum loop filter bandwidth once locked is
128 Hz.
4. CONFIGURATION INFORMATION
The CS2300-03 has been factory pre-programmed with a unique configuration. The following table outlines the spe-
cific configuration profile which can be compared to the CS2300-OTP datasheet for detailed functional descriptions.
OTP Modal and Global Configuration Parameters Form
Mode 0
Mode 1
Ratio 0 (dec)
1
4
Ratio 0 (hex)
00:10:00:00
00:40:00:00
RModSel1
0
0
RModSel0
0
0
AuxOutSrc1
0
0
AuxOutSrc0
1
1
AutoRMod
0
0
Global Configuration Set
ClkSkipEn AuxLockCfg ClkOutUnl LFRatioCfg M2Cfg2
0
0
0
1
1
ClkIn_BW2 ClkIn_BW1 ClkIn_BW0
1
1
1
Mode 2
128
08:00:00:00
0
0
0
1
0
M2Cfg1
1
M2Cfg0
1
Mode 3
256
10:00:00:00
0
0
0
1
0
5. ORDERING INFORMATION
Product
CS2300-03
CDK-2000
Description Package
Clocking Device 10L-MSOP
Evaluation Platform
-
Pb-Free
Yes
Yes
Grade
Commercial
-
Temp Range Container Order#
Rail CS230003-CZZ
-10° to +70°C
Tape and
Reel
CS230003-CZZR
-
-
CDK-2000-LCO
PS856A1
2