CDB42L73 Datasheet, PDF (16/36 Pages) Cirrus Logic – Ecaluation Borard for the CS42L73

CDB42L73
4.3.3 Clocking XSP VSP ASP Tab
The “Clocking XSP VSP ASP” tab contains the main controls for setting the clocking related options of all
functional blocks in the CS42L73. A brief description of each control group is described below.
• Disable MCLK - register control that disables the master clock within the CS42L73 when checked
• External MCLK Source - register control to select either the MCLK1 or the MCLK2 pin on the CS42L73
as the external master clock source
• Internal MCLK Frequency - register control to select the internal master clock frequency (note: internal
master clock is derived from the external master clock selected with the “External MCLK Source” menu)
• Digital MIC Shift Clock - register control to select the digital mic shift clock frequency (note: digital mic
clock is derived from the internal master clock as configured with the “Internal MCLK Frequency” menu)
• XSP - register controls to configure the Auxiliary Serial Port
• VSP - register controls to configure the Voice Serial Port
• ASP - register controls to configure the Audio Serial Port
• Refresh Page - reads all registers in all devices and updates the values in the GUI
• Reset CS42L73 - resets the CS42L73
Figure 8. The “Clocking XSP VSP ASP” Tab in FlexGUI for the CDB42L73
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DS882DB1