WM8775 Datasheet, PDF (13/39 Pages) Wolfson Microelectronics plc – 24 BIT 96 KHZ ADC WITH 4 CHANNEL I/P MULTIPLEXER

Production Data
WM8775
Figure 10 Typical Power up Sequence where AVDD is Powered before DVDD
Typical POR Operation (typical values, not tested)
SYMBOL
Vpora
Vporr
Vpora_off
Vpord_off
MIN
0.5
0.5
1.0
0.6
TYP
0.7
0.7
1.4
0.8
MAX
1.0
1.1
2.0
1.0
UNIT
V
V
V
V
In a real application the designer is unlikely to have control of the relative power up sequence of
AVDD and DVDD. Using the POR circuit to monitor VMID ensures a reasonable delay between
applying power to the device and Device Ready.
Figure 9 and Figure 10 show typical power up scenarios in a real system. Both AVDD and DVDD
must be established and VMID must have reached the threshold Vporr before the device is ready
and can be written to. Any writes to the device before Device Ready will be ignored.
Figure 9 shows DVDD powering up before AVDD. Figure 10 shows AVDD powering up before
DVDD. In both cases, the time from applying power to Device Ready is dominated by the charge
time of VMID.
A 10uF cap is recommended for decoupling on VMID. The charge time for VMID will dominate the
time required for the device to become ready after power is applied. The time required for VMID to
reach the threshold is a function of the VMID resistor string and the decoupling capacitor. The
Resistor string has an typical equivalent resistance of 50kΩ (+/-20%). Assuming a 10uF capacitor,
the time required for VMID to reach threshold of 1V is approx 110ms.
w
PD, Rev 4.4, October 2008
13