CS3302A Datasheet, PDF (12/16 Pages) Cirrus Logic – High-Z, Programmable Gain, Differential Amplifier

CS3302A
DS765PP1
CS3302A
2.2.2 Mux Selection
The analog inputs to the amplifier are multiplexed,
with external signals applied to the INA+, INA- or
INB+, INB- pins. An internal termination is also
available for noise tests. Input mux selection is
made using the MUX0 and MUX1 pins as shown
in Table 1 on page 8.
Although a mux selection is provided to enable the
INA and INB switches simultaneously, significant
current should not be driven through them in this
mode. The CS3302A mux switches will maintain
good linearity only with minimal signal current.
2.2.3 Power Down Selection
A power-down mode is available to shut down the
amplifier when not in use. When enabled, all inter-
nal circuitry is disabled, the analog inputs and out-
puts go high-impedance, and the device enters a
micro-power state. Power down mode is selected
using the PWDN pin, which is active high.
2.3 Power Supplies
2.3.1 Analog Power Supplies
The analog power pins of the CS3302A are to be
supplied with a total of 5 V between VA+ and VA-
. This voltage is typically from a bipolar ±2.5 V
supply. When using bipolar supplies the analog
signal common mode voltage should be biased to 0
V. The analog power supplies are recommended to
be bypassed to system ground using 0.1 µF X7R
type capacitors.
The VA- supply is connected to the CMOS sub-
strate and as such must remain the most negative
applied voltage to prevent potential latch-up condi-
tions. It is recommended to clamp the VA- supply
to system ground using a reverse biased Schottky
diode to prevent possible latch-up conditions relat-
ed to mismatched supply rail initialization.
2.3.2 Digital Power Supplies
The digital power supply across the VD and GND
pins is specified for a +3.3 V power supply. The
digital power supply should be bypassed to system
ground using a 0.01 µF X7R type capacitor.
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DS765PP1