CS8422_10 Datasheet, PDF (1/82 Pages) Cirrus Logic – 24-bit, 192-kHz, Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver

CS8422
24-bit, 192-kHz, Asynchronous Sample Rate Converter with
Integrated Digital Audio Interface Receiver
Sample Rate Converter Features
 140 dB Dynamic Range
 -120 dB THD+N
 No External Master Clock Required
 Supports Sample Rates up to 211 kHz
 Input/Output Sample Rate Ratios from 6:1 to
1:6
 Master Mode Master Clock/Sample Rate Ratio
Support: 64, 96, 128, 192, 256, 384, 512, 768,
1024
 16, 18, 20, or 24-bit Data I/O
 Dither Automatically Applied and Scaled to
Output Resolution
 Multiple Device Outputs are Phase Matched
Digital Audio Interface Receiver
Features
 Complete EIAJ CP1201, IEC-60958, AES3,
S/PDIF Compatible Receiver
 28 kHz to 216 kHz Sample Rate Range
 2:1 Differential AES3 or 4:1 S/PDIF Input Mux
 De-emphasis Filtering for 32 kHz, 44.1 kHz,
and 48 kHz
 Recovered Master Clock Output: 64 x Fs,
96 x Fs, 128 x Fs, 192 x Fs, 256 x Fs,
384 x Fs, 512 x Fs, 768 x Fs, 1024 x Fs
 49.152 MHz Maximum Recovered Master
Clock Frequency
 Ultralow-jitter Clock Recovery
 High Input Jitter Tolerance
 No External PLL Filter Components Required
 Selectable and Automatic Clock Switching
 AES3 Direct Output and AES3 TX Pass-
through
 On-chip Channel Status Data Buffering
 Automatic Detection of Compressed Audio
Streams
 Decodes CD Q Sub-Code
VL
SDIN
ISCLK
ILRCK
RX0/RXP0
RX1/RXN0
RX2/RXP1
RX3/RXN1
VA
AGND
DGND
V_REG
Serial
Audio
Input
4:1
MUX
Clock
Generator
Level Translators
Receiver
Clock &
Data
Recovery
(PLL)
2:1
MUX
Sample
Rate
Converter
C or U Data Buffer
(First 5 Bytes)
Format
Detect
Control Port & Registers
Level Translators
3:1
MUX
Serial
Audio
Output
3:1
MUX
Serial
Audio
Output
General
Purpose
Outputs
SDOUT1
OSCLK1
OLRCK1
TDM_IN
SDOUT2
OSCLK2
OLRCK2
GPO0
GPO1
GPO2
GPO3
XTI XTO
RMCK
http://www.cirrus.com
SDA/ SCL/ AD1/ AD0/
CDOUT CCLK CDIN CS
Copyright  Cirrus Logic, Inc. 2010
(All Rights Reserved)
FEB '10
DS692F1