CS5581 Datasheet, PDF (1/32 Pages) Cirrus Logic – ±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ΔΣ ADC

8/21/07
15:56
CS5581
±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ∆Σ ADC
Features & Description
‰ Single-ended Analog Input
‰ On-chip Buffers for High Input Impedance
‰ Conversion Time = 5 µS
‰ Settles in One Conversion
‰ Linearity Error = 0.0007%
‰ Signal-to-Noise = 81 dB
‰ S/(N + D) = 81 dB
‰ DNL = ±0.1 LSB Max.
‰ Self-calibration:
- Maintains accuracy over time & temperature.
‰ Simple three/four-wire serial interface
‰ Power Supply Configurations:
- Analog: +5V/GND; IO: +1.8V to +3.3V
- Analog: ±2.5V; IO: +1.8V to +3.3V
‰ Power Consumption:
- ADC Input Buffers On: 85 mW
- ADC Input Buffers Off: 60 mW
General Description
The CS5581 is a single-channel, 16-bit analog-to-digital
converter capable of 200 kSps conversion rate. The input
accepts a single-ended analog input signal. On-chip buff-
ers provide high input impedance for both the AIN input
and the VREF+ input. This significantly reduces the drive
requirements of signal sources and reduces errors due to
source impedances. The CS5581 is a delta-sigma convert-
er capable of switching multiple input channels at a high
rate with no loss in throughput. The ADC uses a low-laten-
cy digital filter architecture. The filter is designed for fast
settling and settles to full accuracy in one conversion. The
converter's 16-bit data output is in serial format, with the
serial port acting as either a master or a slave. The convert-
er is designed to support bipolar, ground-referenced
signals when operated from ±2.5V analog supplies.
The CS5581 uses self-calibration to achieve low offset and
gain errors. The converter achieves a S/N of 81 dB. Linear-
ity is 0.0007% of full scale.
The converter can operate from an analog supply of 0-5V
or from ±2.5V. The digital interface supports standard logic
operating from 1.8, 2.5, or 3.3 V.
ORDERING INFORMATION:
See Ordering Information on page 31.
V1+
V2+
VL
VREF+
VREF-
AIN
ACOM
ADC
CS5581
DIGITAL
FILTER
LOGIC
SERIAL
INTERFACE
SMODE
CS
SCLK
SDO
RDY
BUFEN
OSC/CLOCK
GENERATOR
CALIBRATION
MICROCONTROLLER
RST
CONV
CAL
BP/UP
MCLK
V1-
V2-
TST
DCR
VLR
VLR2
Advance Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
AUG ‘07
DS796A1