CS5530 Datasheet, PDF (1/36 Pages) National Semiconductor (TI) – Geode™ CS5530 I/O Companion Multi-Function South Bridge

CS5530
24-bit ADC with Ultra-low-noise Amplifier
Features & Description
 Chopper-stabilized Instrumentation
Amplifier, 64X
• 12 nV/√Hz @ 0.1 Hz (No 1/f noise)
• 1200 pA Input Current
 Digital Gain Scaling up to 40x
 Delta-sigma Analog-to-digital Converter
• Linearity Error: 0.0015% FS
• Noise Free Resolution: Up to 19 bits
 Scalable V_REF Input: Up to Analog Supply
 Simple Three-wire Serial Interface
• SPI™ and Microwire™ Compatible
• Schmitt-trigger on Serial Clock (SCLK)
 Onboard Offset and Gain Calibration
Registers
 Selectable Word Rates: 6.25 to 3,840 Sps
 Selectable 50 or 60 Hz Rejection
 Power Supply Configurations
• VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V
• VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V
• VA+ = +3 V; VA- = -3 V; VD+ = +3 V
General Description
The CS5530 is a highly integrated ΔΣ Analog-to-Digital
Converter (ADC) which uses charge-balance techniques
to achieve 24-bit performance. The ADC is optimized for
measuring low-level unipolar or bipolar signals in weigh
scale, process control, scientific, and medical
applications.
To accommodate these applications, the ADC includes
a very-low-noise, chopper-stabilized instrumentation
amplifier (12 nV/√Hz @ 0.1 Hz) with a gain of 64X. This
device also includes a fourth-order ΔΣ modulator fol-
lowed by a digital filter which provides twenty selectable
output word rates of 6.25, 7.5, 12.5, 15, 25, 30, 50, 60, 100,
120, 200, 240, 400, 480, 800, 960, 1600, 1920, 3200, and
3840 Sps (MCLK = 4.9152 MHz).
To ease communication between the ADC and a micro-
controller, the converter includes a simple three-wire se-
rial interface which is SPI and Microwire compatible with
a Schmitt-trigger input on the serial clock (SCLK).
High dynamic range, programmable output rates, and
flexible power supply options make this device an ideal
solution for weigh scale and process control
applications.
ORDERING INFORMATION
See page 35.
VA+ C1
C2
VREF+ VREF-
VD+
AIN1+
AIN1-
64X
DIFFERENTIAL
4^TH ORDER ΔΣ
MODULATOR
PROGRAMMABLE
SINC FIR FILTER
SERIAL
INTERFACE
CS
SDI
SDO
SCLK
VA-
http://www.cirrus.com
LATCH
A0
A1
CLOCK
GENERATOR
OSC1 OSC2
CALIBRATION
SRAM/CONTROL
LOGIC
DGND
Copyright  Cirrus Logic, Inc. 2009
(All Rights Reserved)
MAY ‘09
DS742F2