English
Language : 

CS5345_07 Datasheet, PDF (1/41 Pages) Cirrus Logic – 104 dB, 24-Bit, 192 kHz Stereo Audio ADC
CS5345
104 dB, 24-Bit, 192 kHz Stereo Audio ADC
A/D Features
 Multi-Bit Delta Sigma Modulator
 104 dB Dynamic Range
 -95 dB THD+N
 Stereo 6:1 Input Multiplexer
 Programmable Gain Amplifier (PGA)
– ± 12 dB Gain, 0.5 dB Step Size
– Zero Crossing, Click-Free Transitions
 Stereo Microphone Inputs
– +32 dB Gain Stage
– Low-Noise Bias Supply
 Up to 192 kHz Sampling Rates
 Selectable Serial Audio Interface Formats
– Left-Justified up to 24-bit
– I²S up to 24-bit
 High-Pass Filter or DC Offset Calibration
System Features
 Power-Down Mode
 +3.3 V to +5 V Analog Power Supply, Nominal
 +3.3 V to +5 V Digital Power Supply, Nominal
 Direct Interface with 1.8 V to 5 V Logic Levels
 Pin-Compatible with CS4245
General Description
The CS5345 integrates an analog multiplexer, program-
mable gain amplifier, and stereo audio analog-to-digital
converter. The CS5345 performs stereo analog-to-digi-
tal (A/D) conversion of up to 24-bit serial values at
sample rates up to 192 kHz.
A 6:1 stereo input multiplexer is included for selecting
between line-level and microphone-level inputs. The
microphone input path includes a +32 dB gain stage
and a low-noise bias voltage supply. The PGA is avail-
able for line or microphone inputs and provides
gain/attenuation of ± 12 dB in 0.5 dB steps.
The output of the PGA is followed by an advanced 5th-
order, multi-bit delta sigma modulator and digital filter-
ing/decimation. Sampled data is transmitted by the
serial audio interface at rates from 4 kHz to 192 kHz in
either Slave or Master Mode.
Integrated level translators allow easy interfacing be-
tween the CS5345 and other devices operating over a
wide range of logic levels.
The CS5345 is available in a 48-pin LQFP package in
Commercial (-10° to +70° C) and Automotive (-40° to
+105° C) grade. The CDB5345 Customer Demonstra-
tion board is also available for device evaluation and
implementation suggestions. Please refer to “Ordering
Information” on page 41 for complete details.
1.8 V to 5 V
I²C/SPI
Control Data
Interrupt
Overflow
Reset
Serial
Audio
Output
3.3 V to 5 V
3.3 V to 5 V
Register Configuration
High Pass
Filter
Low-Latency
Anti-Alias Filter
High Pass
Filter
Low-Latency
Anti-Alias Filter
Internal Voltage
Reference
Multibit
Oversampling
ADC
Multibit
Oversampling
ADC
PGA
MUX
PGA
+32 dB
+32 dB
Left PGA Output
Right PGA Output
Stereo Input 1
Stereo Input 2
Stereo Input 3
Stereo Input 4 /
Mic Input 1 & 2
Stereo Input 5
Stereo Input 6
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
AUGUST '07
DS658F2